Technologies for providing hardware resources as a service with direct resource addressability
AssigneeIntel Corporation
InventorsRaghu Kondapalli, Alexander Bachmutsky, Francesc Guim Bernat, Ned M. Smith
Life of this patent
Estimating the term…
Abstract
Technologies for providing hardware resources as a service with direct resource addressability are disclosed. According to one embodiment of the present disclosure, a device receives a request to access a destination accelerator device in an edge network, the request specifying a destination address assigned to the destination accelerator device. The device determines, as a function of the destination address, a location of the destination accelerator device and sends the request to the destination accelerator device.
Claims16
A device comprising:
- circuitry to:
- receive a request to access a destination accelerator device in an edge network, the request specifying a destination address assigned to the destination accelerator device;
- determine, as a function of the destination address as assigned in a memory space, a location of the destination accelerator device;
- determine whether the request is valid according to an access control policy specifying at least one of an access initiator, destination address, access time, or access frequency;
- evaluate a message bus providing an availability status of the destination accelerator device;
- and
- send the request to the destination accelerator device.
A method comprising:
- receiving, by a device, a request to access a destination accelerator device in an edge network, the request specifying a destination address assigned to the destination accelerator device;
- determining, by the device and as a function of the destination address as assigned in a memory space, a location of the destination accelerator device;
- determining, by the device, whether the request is valid according to an access control policy specifying at least one of an access initiator, destination address, access time, or access frequency;
- evaluating, by the device, a message bus providing an availability status of the destination accelerator device;
- and
- sending, by the device, the request to the destination accelerator device.
A device comprising:
- circuitry for receiving a request to access a destination accelerator device in an edge network, the request specifying a destination address assigned to the destination accelerator device;
- means for determining, as a function of the destination address as assigned in a memory space, a location of the destination accelerator device;
- means for determining whether the request is valid according to an access control policy specifying at least one of an access initiator, destination address, access time, or access frequency;
- circuitry for evaluating a message bus providing an availability status of the destination accelerator device;
- and
- circuitry for sending the request to the destination accelerator device.
Dependencies are inferred from the claim text.