Low-power receiver for FSK back-channel embedded in 5.8GHz Wi-Fi OFDM packets
AssigneeThe Regents of the University of Michigan
InventorsDavid D. Wentzloff, Hun-Seok Kim, Jaeho Im
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AssigneeThe Regents of the University of Michigan
InventorsDavid D. Wentzloff, Hun-Seok Kim, Jaeho Im
Estimating the term…
An ultra-low power back-channel receiver is presented that demodulates binary a FSK back-channel signal embedded in 5.8 GHz IEEE 802.11a Wi-Fi OFDM packets. The architecture of the back-channel receiver employs a two-step down-conversion where the first mixing stage downconverts using the third harmonic of the local oscillator for power efficiency. The LP-65 nm CMOS receiver consumes 335 μW with a sensitivity of −72 dBm at a BER of 10−3 and data-rate of 31.25 kb/s. The radio uses a balun and a 250 kHz reference crystal as external components. The receiver uses a 1V supply voltage for analog blocks, and 0.85V for digital blocks including the local oscillator and the frequency-locked loop circuits.
A low power RF receiver, comprising:
A low power RF receiver, comprising:
Dependencies are inferred from the claim text.