Decompression engine for executable microcontroller code
AssigneeRedpine Signals, Inc.
InventorsSubba Reddy Kallam, Sriram Mudulodu
Life of this patent
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Abstract
A code decompression engine reads compressed code from a memory containing a compressed code part and a dictionary part. The compressed code part contains a series of instructions being either an uncompressed instruction preceded by an uncompressed code bit, or a compressed instruction having a compressed code bit followed by a number of segments field followed by segments, followed by a directory index indication a directory location to read. Each segment consists of a mask type, a mask offset, and a mask.
Claims20
A method for decompression of a compressed code image comprising a dictionary part containing uncorrected instructions and a compressed instruction part, the method comprising:
- reading a sequence of instructions from a compressed instruction part, each compressed instruction comprising:
- a first bit indicating a compressed or uncompressed instruction;
- where, if the first bit indicates an uncompressed instruction, reading a fixed number of subsequent bits and returning the fixed number of subsequent bits as data;
- and where, if the first bit indicates a compressed instruction:
- reading a field indicating the number of segments;
- for each segment, reading a mask and mask location;
- reading an index field;
- reading the dictionary value corresponding to the index field as an uncorrected instruction;
- modifying the uncorrected instruction into a corrected instruction by applying each mask and mask location to the uncorrected instruction.
A compressed code controller comprising:
- a compressed instruction memory containing mixture of compressed instructions and uncompressed instructions, each compressed instruction or uncompressed instruction identified by a bit accompanying each compressed instruction or uncompressed instruction;
- dictionary entries having a length equal to an uncompressed instruction;
- a compressed instruction parser receiving a CPU address from a processor when the bit indicates a compressed instruction;
- the compressed instruction parser extracting an index pointer, masks, and mask locations and an index pointer;
- an instruction modifier applying masks and mask locations to modify an instruction extracted from a dictionary entry associated with the index pointer.
A method for converting an uncompressed executable image having instructions including branch instructions into a compressed image, the method comprising:
- forming a table of uncompressed branch instructions with target branch addresses and all other non-branch instructions or data;
- forming a list of dictionary entries and masks for iteratively changing each dictionary entry into one of the non-branch instructions or data, the list of dictionary entries and masks iteratively formed to a size less than the uncompressed size of dictionary entries and masks;
- forming a list of uncompressed image branch target addresses and associated compressed image branch target addresses;
- forming a list of compressed instructions by translating each uncompressed instruction or data into a dictionary index and optional masks from the dictionary entries;
- for each uncompressed branch target address, substituting a corresponding compressed image branch target address from the table of uncompressed instructions to the list of compressed instructions for each target address.
A controller receiving an address from a processor and delivering corresponding executable code or data for the address, the controller comprising:
- a memory containing compressed executable code, the compressed executable code comprising a dictionary part and a sequence of data, the data being at least one of:
- an uncompressed branch instruction or a compressed instruction comprising a field identifying a number of segments, each segment comprising a mask type, a mask location for where the mask is to be applied, and a mask pattern, the mask segments followed by a dictionary index referencing the dictionary part;
- a compressed instruction processor identifying compressed instructions or data, the compressed instruction processor retrieving a data entry corresponding to the address, thereafter retrieving the dictionary entry associated with the dictionary index and applying the associated mask patterns in the mask locations, providing the resultant value as the corresponding executable code;
- a branch processor identifying branch instructions, the branch processor returning a branch instruction corresponding to the address.
Dependencies are inferred from the claim text.