Memory cells with asymmetrical electrode interfaces
AssigneeMicron Technology, Inc.
InventorsAgostino Pirovano, Kolya Yastrebenetsky, Anna Maria Conti, Fabio Pellizzer
Life of this patent
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Abstract
Methods, systems, and devices for memory cells with asymmetrical electrode interfaces are described. A memory cell with asymmetrical electrode interfaces may mitigate shorts in adjacent word lines, which may be leveraged for accurately reading a stored value of the memory cell. The memory device may include a self-selecting memory component with a top surface area in contact with a top electrode and a bottom surface area in contact with a bottom electrode, where the top surface area in contact with the top electrode is a different size than the bottom surface area in contact with the bottom electrode.
Claims15
A memory device, comprising:
- a top electrode;
- a bottom electrode;
- and
- a self-selecting memory component having a first contact area of a top surface in direct contact with the top electrode and a second contact area of a bottom surface opposite the top surface, wherein the first contact area in direct contact with the top electrode is a different size than the second contact area in direct contact with the bottom electrode,
- wherein the top electrode includes a third contact area of a top surface in direct contact with a digit line, the third contact area of the top surface extending from a first side surface of the top electrode to a second side surface of the top electrode.
Dependencies are inferred from the claim text.