Semiconductor device with a recessed ohmic contact and methods of fabrication

A gallium nitride (GaN) transistor device comprising:

• a semiconductor substrate comprising:
• a host substrate;
• a buffer layer formed over the host substrate wherein the buffer layer includes at least one additional layer;
• a GaN channel layer formed over the buffer layer and in contact with the at least one additional layer, wherein a bandgap of the at least one additional layer differs from a bandgap of the GaN channel layer;
• a barrier layer formed over the channel layer, forming a channel in the channel layer;
• a GaN cap layer formed over the barrier layer;
• an ohmic contact formed over and in contact with the semiconductor substrate, recessed through the GaN cap layer and electrically coupled to the channel;
• an isolation region defining an active region along an upper surface of the semiconductor substrate;
• one or more dielectric layers disposed over the semiconductor substrate;
• and
• a gate electrode disposed adjacent the ohmic contact and entirely over the cap layer, wherein the gate electrode forms a Schottky contact with the semiconductor substrate, wherein an overhang portion of the gate electrode overlaps and vertically contacts the one or more dielectric layers in a region laterally adjacent the Schottky contact, and wherein the overhang portion of the gate electrode and the one or more dielectric layers forms a metal-insulator stack directly above and in contact with the GaN cap layer.

A method of fabricating a semiconductor device, the method comprising:

• providing a host substrate;
• forming a buffer layer over the host substrate wherein the buffer layer includes at least one additional layer;
• forming a GaN channel layer over the buffer layer, wherein a bandgap of the at least one additional layer differs from a bandgap of the channel layer;
• forming a barrier layer-over the channel layer;
• forming a GaN cap layer over the barrier layer;
• recessing through the GaN cap layer;
• and
• forming an ohmic contact over the channel layer;
• forming one or more dielectric layers over the GaN cap layer;
• and
• forming a gate electrode entirely over the GaN cap layer adjacent the ohmic contact, wherein a portion of the gate electrode overlaps the first dielectric layer laterally adjacent the Schottky contact, and wherein an overhang portion of the gate electrode overlaps and vertically contacts the one or more dielectric layers in a region laterally adjacent the Schottky contact, and wherein the overhang portion of the gate electrode and the one or more dielectric layers forms a metal-insulator stack directly above and in contact with the GaN cap layer.