Prevention of extension narrowing in nanosheet field effect transistors
AssigneeInternational Business Machines Corporation
InventorsTenko Yamashita, Chun W. Yeung, Chen Zhang
Life of this patent
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Abstract
Semiconductor devices and methods of forming the same include forming a stack of layers of alternating materials, including first layers of sacrificial material and second layers of channel material. The first layers are recessed relative to the second layers with an etch that etches the second layers at a slower rate than the first layers to taper ends of the second layers. First spacers are formed in recesses formed by recessing the first layers. Second spacers are formed in recesses formed by recessing the first layers. The first spacers are etched to expose sidewalls of the second spacer. Source/drain extensions are formed in contact with exposed ends of the second layers.
Claims17
A semiconductor device, comprising:
- a plurality of semiconductor layers;
- a source and drain extension formed at respective ends of the one or more semiconductor layers;
- a gate stack formed on and around the plurality of semiconductor layers;
- and
- spacers formed between vertically adjacent semiconductor layers, each spacer comprising a first spacer layer and a second spacer layer, the first spacer layer being positioned between the gate stack and the second spacer layer and the second spacer layer of each spacer having a trapezoidal cross-section.
A semiconductor device, comprising:
- a plurality of semiconductor layers;
- a source and drain extension formed at respective ends of the one or more semiconductor layers;
- a gate stack formed on and around the plurality of semiconductor layers;
- and
- spacers formed between vertically adjacent semiconductor layers, each spacer comprising a first spacer layer and a second spacer layer, the first spacer layer being positioned between the gate stack and the second spacer layer and the second spacer layer of each spacer having a trapezoidal cross-section, wherein the source and drain extensions fill a space within a perimeter defined by adjacent surfaces of the semiconductor layers and the spacers.
A semiconductor device, comprising:
- a plurality of semiconductor layers;
- a source and drain extension formed at respective ends of the one or more semiconductor layers;
- a gate stack formed on and around the plurality of semiconductor layers;
- and
- spacers formed between vertically adjacent semiconductor layers, each spacer comprising a first spacer layer and a second spacer layer, the first spacer layer being positioned between the gate stack and the second spacer layer and the second spacer layer of each spacer having a trapezoidal cross-section, wherein the source and drain extensions fill a space within a perimeter defined by adjacent surfaces of the second spacer layer of vertically adjacent spacers.
Dependencies are inferred from the claim text.