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US 10,541,312 B2Granted
Air-gap top spacer and self-aligned metal gate for vertical fets
AssigneeInternational Business Machines Corporation
InventorsVeeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert, Junli Wang
Life of this patent
Estimating the term…
Abstract
A transistor includes a channel fin. A gate stack is formed on sidewalls of the channel fin. A top spacer is formed over the gate stack. The top spacer includes dielectric material that fully encapsulates air gaps directly above the gate stack. A top source/drain region formed on the channel fin.
Claims20
A transistor, comprising:
- a channel fin;
- a gate stack formed on sidewalls of the channel fin;
- a top spacer formed over the gate stack, the top spacer comprising dielectric material that fully encapsulates air gaps directly above the gate stack;
- and
- a top source/drain region formed on the channel fin, in a gap in the top spacer.
2 more elements
A transistor, comprising:
- a channel fin having a base portion and an upper portion, wherein the base portion has a width greater than a width of the upper portion;
- a gate stack formed on sidewalls of the channel fin;
- a top spacer formed over the gate stack, the top spacer comprising dielectric material that fully encapsulates air gaps directly above the gate stack;
- and
- a top source/drain region formed on the channel fin.
2 more elements
A transistor, comprising:
- a channel fin;
- a gate stack formed on sidewalls of the channel fin;
- a top spacer formed over the gate stack, the top spacer comprising dielectric material that fully encapsulates air gaps directly above the gate stack and that includes a first dielectric layer and a second dielectric layer, the second dielectric layer having a lower dielectric constant than the first dielectric layer;
- and
- a top source/drain region formed on the channel fin.
2 more elements
Dependencies are inferred from the claim text.