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US 10,541,270 B2Granted
Method for fabricating an array of diodes, in particular for a non-volatile memory, and corresponding device
AssigneeSTMicroelectronics (Rousset) SAS
InventorsFrancesco La Rosa, Stephan Niel, Arnaud Regnier
Life of this patent
Estimating the term…
Abstract
The array of diodes comprises a matrix plane of diodes arranged according to columns in a first direction and according to rows in a second direction orthogonal to the first direction. The said diodes comprise a cathode region of a first type of conductivity and an anode region of a second type of conductivity, the said cathode and anode regions being superposed and disposed on an insulating layer situated on top of a semiconductor substrate.
Claims20
A method, comprising:
- fabricating an array of diodes, the fabricating including:
- forming an insulating layer on a surface of a semiconductor substrate;
- forming a first semiconductor layer of a first type of conductivity on the insulating layer;
- forming a dielectric buffer layer on the first semiconductor layer;
- etching the dielectric buffer layer into strips running lengthwise in a first direction;
- forming a second semiconductor layer of a second type of conductivity;
- etching, down to the insulating layer, the second semiconductor layer, the strips of the dielectric buffer layer, and the first semiconductor layer, into strips running lengthwise in a second direction orthogonal to the first direction, each strip of the second semiconductor layer being positioned over a strip of the first semiconductor layer and a plurality of discrete pads of the dielectric buffer layer between the strip of the second semiconductor layer and the strip of the first semiconductor layer;
- and
- removing by etching, down to the buffer layer, strips of the second semiconductor layer running lengthwise in the first direction, in such a manner as to form semiconductor pads of the second semiconductor layer on strips of the first semiconductor layer, adjacent ones of the semiconductor pads being separated by a respective discrete pad of the plurality of discrete pads of the dielectric buffer layer.
6 more elements
A method, comprising:
- patterning a dielectric layer on a wafer into dielectric strips oriented in a first direction, the dielectric layer being over a first semiconductor layer, the first semiconductor layer being over an insulation layer that is over a substrate of the wafer;
- forming a second semiconductor layer over the dielectric strips;
- patterning the second semiconductor layer, the first semiconductor layer and the dielectric strips into fin structures oriented in a second direction orthogonal to the first direction, each fin structure including a strip of the second semiconductor layer over a strip of the first semiconductor layer and a plurality of discrete dielectric pads between the strip of the second semiconductor layer and the strip of the first semiconductor layer;
- and
- forming discrete semiconductor pads by patterning the fin structures, adjacent discrete semiconductor pads being separated by a respective dielectric pad of the plurality of discrete dielectric pads in the second direction.
2 more elements
A method, comprising:
- forming an insulating layer over a surface of a substrate;
- forming a first semiconductor layer of a first type of conductivity over the insulating layer;
- forming a dielectric buffer layer over the first semiconductor layer;
- patterning the dielectric buffer layer into a buffer strip oriented in a first direction;
- forming a second semiconductor layer of a second type of conductivity over the buffer strip;
- forming a fin structure oriented in a second direction different from the first direction by patterning, down to the insulating layer, the second semiconductor layer, the buffer strip, and the first semiconductor layer, each fin structure including a strip of the second semiconductor layer positioned over a strip of the first semiconductor layer, a plurality of discrete pads of the dielectric buffer layer being positioned between the strip of the second semiconductor layer and the strip of the first semiconductor layer;
- and
- forming a discrete semiconductor pad by further patterning the second semiconductor layer of the fin structure, adjacent ones of the semiconductor pads being separated by a respective discrete pad of the plurality of discrete pads of the dielectric buffer layer.
5 more elements
Dependencies are inferred from the claim text.