Layout pattern for static random access memory
AssigneeUnited Microelectronics Corp.
InventorsPo-Lin Chen, Tsung-Hsun Wu
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Abstract
The present invention provides a layout pattern of a static random access memory (SRAM), comprising at least two inverters coupled to each other for storing data, each inverter comprising an L-shaped gate structure on a substrate, the L-shaped gate structure includes a first portion arranged along a first direction and a second portion aligned along a second direction, wherein the first portion crosses a first diffusion region to form a pull-up device, and the first portion crosses a second diffusion region and a third diffusion region to form a pull-down device, and each of the inverters includes a local interconnection layer, crossing the second diffusion region and the third diffusion region.
Claims16
A static random access memory (SRAM) layout pattern, comprising:
- two inverters coupling to each other to store data, and the two inverters comprise a first inverter and a second inverter, each of the inverters comprising at least one pull-up transistor (PUs) and at least a pull-down transistor (PDs);
- each of the inverters comprises an L-shaped gate structure on a substrate, the L-shaped gate structure comprises a first portion arranged along a first direction, and a second portion arranged along a second direction, wherein the first portion crosses a first diffusion region to form the pull-up transistor, wherein the first portion simultaneously crosses a second diffusion region and a third diffusion region to form the pull-down transistor;
- each of the inverters comprises an inverter output connected to a first access gate structure and a second access gate structure on the substrate, wherein the first access gate structure and the second access gate structure are arranged along the first direction, wherein the first access gate structure crosses the second diffusion region to form a first access element (PG1), the second access gate structure across the third diffusion region to form a second access element (PG2);
- and
- each of the inverters comprises a local interconnection layer crossing the second diffusion region and the third diffusion region.
A static random access memory (SRAM) layout pattern, comprising:
- two inverters coupling to each other to store data, and the two inverters comprise a first inverter and a second inverter, each of the inverters comprising at least one pull-up transistor (PUs) and at least a pull-down transistor (PDs);
- each of the inverters includes a step-shaped structure on a substrate, the step-shaped structure comprises a first portion and a second portion arranged along a first direction, and a bridge portion located between the first portion and the second portions, the bridge portion is arranged along a second direction, wherein the first portion crosses a first diffusion region to form the pull-up transistor, wherein the second portion crosses a second diffusion region to form the pull-down device;
- each of the inverters comprises an inverter output connected to a first access gate structure and a second access gate structure on the substrate, wherein the first access gate structure, the second access gate structure and the first portion are arranged along a same direction, and comprise the same symmetry axis, wherein the first access gate structure crosses the second diffusion region to form a first access element (PG1), the second access gate structure across the second diffusion region to form a second access element (PG2);
- and
- each of the inverters comprises a local interconnection layer crossing the second diffusion region.
Dependencies are inferred from the claim text.