Fan-out semiconductor package

A fan-out semiconductor package comprising:

• a semiconductor chip having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface;
• an encapsulant encapsulating at least a portion of the semiconductor chip;
• a connection member disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads of the semiconductor chip;
• a passivation layer disposed on the connection member;
• and
• electrical connection structures disposed on the passivation layer opposite to the connection member,
• wherein the fan-out semiconductor package has a second slot entirely penetrating through at least a portion of the passivation layer in a thickness direction, and
• wherein the second slot is disposed spaced apart from the electrical connection structures.

A fan-out semiconductor package comprising:

• a connection member including a plurality of insulating layers, and a plurality of redistribution layers each including conductive traces disposed on insulating layers of the plurality of insulating layers;
• a core member disposed on a first surface of the connection member;
• a semiconductor chip disposed on the first surface of the connection member in a through-hole of the core member, the semiconductor chip having connection pads electrically connected to the redistribution layers of the connection member;
• and
• a passivation layer disposed on a second surface of the connection member opposite to the first surface thereof,
• wherein a first slot is disposed in the core member and a second slot is disposed in the passivation layer and the first slot is entirely filled with a material different from that of the core member, and
• wherein a portion of the connection member is externally exposed through the second slot.