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US 10,541,213 B2Granted
Backside redistribution layer (RDL) structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPo-Hao Tsai, Jing-Cheng Lin
Life of this patent
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Abstract
An embodiment package on package (PoP) device includes a molding compound having a metal via embedded therein, a passivation layer disposed over the molding compound, the passivation layer including a passivation layer recess vertically aligned with the metal via, and a redistribution layer bond pad capping the metal via, a portion of the redistribution layer bond pad within the passivation layer recess projecting above a top surface of the molding compound.
Claims20
A method comprising:
- forming a passivation layer over a carrier substrate, the passivation layer having a first surface and a second surface, the first surface of the passivation layer being opposite the second surface of the passivation layer, the second surface of the passivation layer facing the carrier substrate;
- patterning the passivation layer to form a first opening therein, a width of the first opening decreasing as the first opening extends from the first surface of the passivation layer toward the second surface of the passivation layer;
- depositing a first conductive material along a bottom and sidewalls of the first opening to form a first conductive layer;
- depositing a second conductive material over the first conductive layer in the first opening to form a second conductive layer;
- forming a conductive pillar over the second conductive layer;
- removing portions of the first conductive layer not protected by the conductive pillar and the second conductive layer;
- attaching an integrated circuit die to the passivation layer adjacent the conductive pillar;
- encapsulating the integrated circuit die and the conductive pillar with a molding compound;
- removing the carrier substrate;
- and
- recessing the passivation layer to expose a first portion of the first conductive layer disposed on the sidewalls of the first opening, the recessing forming a gap between a sidewall of the passivation layer and the first portion of the first conductive layer.
8 more elements
A method comprising:
- forming a passivation layer over a carrier substrate, the passivation layer having a first surface and a second surface, the first surface of the passivation layer being opposite the second surface of the passivation layer, the second surface of the passivation layer facing the carrier substrate;
- patterning the passivation layer to form a first opening therein, a first width of the first opening at the first surface of the passivation layer being greater than a second width of the first opening at the second surface of the passivation layer;
- conformally forming a first conductive layer over the passivation layer and in the first opening;
- forming a first sacrificial layer over the first conductive layer;
- patterning the first sacrificial layer to form a second opening therein, the second opening exposing a first portion of the first conductive layer disposed on a bottom and sidewalls of the first opening;
- forming a second conductive layer over the first portion of the first conductive layer exposed by the second opening;
- removing the first sacrificial layer;
- forming a second sacrificial layer over the first conductive layer and the second conductive layer;
- patterning the second sacrificial layer to form a third opening therein, the third opening exposing the second conductive layer;
- forming a conductive pillar over the second conductive layer exposed by the third opening;
- removing the second sacrificial layer;
- removing exposed portions of the first conductive layer;
- attaching an integrated circuit die to the passivation layer adjacent the conductive pillar;
- encapsulating the integrated circuit die and the conductive pillar with a molding compound;
- removing the carrier substrate;
- after removing the carrier substrate, forming a laminating tape adjacent the passivation layer, the second surface of the passivation layer facing the laminating tape;
- and
- recessing the passivation layer and the laminating tape to expose the first portion of the first conductive layer.
15 more elements
A method comprising:
- forming a buffer layer over a carrier substrate;
- forming a passivation layer over the buffer layer, the passivation layer having a first surface and a second surface, the first surface of the passivation layer being opposite the second surface of the passivation layer, the second surface of the passivation layer facing the buffer layer;
- patterning the passivation layer to form a first opening therein, a width of the first opening decreasing as the first opening extends from the first surface of the passivation layer toward the second surface of the passivation layer, the first opening exposing a first surface of the buffer layer;
- conformally depositing a first conductive material over the first surface of the passivation layer and in the first opening to form a first conductive layer;
- forming a first sacrificial layer over the first conductive layer;
- patterning the first sacrificial layer to form a second opening and a third opening therein, the second opening exposing a first portion of the first conductive layer disposed on a bottom and sidewalls of the first opening, the third opening exposing a second portion of the first conductive layer disposed on the first surface of the passivation layer;
- depositing a second conductive material in the second opening to form a second conductive layer over the first portion of the first conductive layer;
- depositing the second conductive material in the third opening to form a third conductive layer over the second portion of the first conductive layer;
- removing the first sacrificial layer;
- forming a second sacrificial layer over the first conductive layer, the second conductive layer, and the third conductive layer;
- patterning the second sacrificial layer to form a fourth opening therein, the fourth opening exposing the second conductive layer;
- depositing a third conductive material in the fourth opening to form a conductive pillar over the second conductive layer;
- removing the second sacrificial layer;
- removing portions of the first conductive layer not covered by the conductive pillar, the second conductive layer and the third conductive layer;
- attaching an integrated circuit die to the passivation layer, the third conductive layer being interposed between the integrated circuit die and the passivation layer;
- encapsulating the integrated circuit die and the conductive pillar with a molding compound;
- removing the carrier substrate;
- and
- patterning the buffer layer and the passivation layer to form a fifth opening in the buffer layer and the passivation layer, a width of the fifth opening decreasing as the fifth opening extends from the second surface of the buffer layer toward the first surface of the passivation layer, the second surface of the buffer layer being opposite the first surface of the buffer layer, the fifth opening exposing the first portion of the first conductive layer.
16 more elements
Dependencies are inferred from the claim text.