Semiconductor devices with bump allocation

A semiconductor device comprising:

• a substrate;
• a bump pattern on the substrate, wherein the bump pattern comprises a plurality of rows and a plurality of columns, a bump site at every intersection between rows of the plurality of rows and columns of the plurality of columns, and a bump is positionable at each bump site;
• a first signal bump at a first bump site, wherein the first signal bump is configured to carry a first differential signal of a pair of differential signals;
• a second signal bump at a second bump site adjacent to the first bump site, wherein the second signal bump is configured to carry a second differential signal of the pair of differential signals;
• and
• a plurality of ground bumps configured to carry a ground voltage, wherein each ground bump of the plurality of ground bumps is located at a bump site adjacent to the first bump site, and at least one bump site adjacent the first bump site is empty.

A semiconductor device comprising:

• a substrate;
• a bump pattern on the substrate, wherein the bump pattern comprises a plurality of rows and a plurality of columns, a bump site at every intersection between rows of the plurality of rows and columns of the plurality of columns, and a bump is positionable at each bump site;
• a first signal bump at a first bump site, wherein the first signal bump is configured to carry a signal;
• and
• at least three ground bumps configured to carry a ground voltage, wherein each ground bump of the at least three ground bumps is located at a bump site adjacent to the first bump site, and
• at least three bump sites adjacent the first bump site are empty.