3D IC bump height metrology APC
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsNai-Han Cheng, Chi-Ming Yang
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsNai-Han Cheng, Chi-Ming Yang
Estimating the term…
The present disclosure, in some embodiments, relates to a substrate metrology system. The substrate metrology system includes a substrate warpage measurement module configured to determine one or more substrate warpage parameters of a substrate by taking a plurality of separate measurements at a plurality of different positions over a substrate. The substrate has a plurality of conductive interconnect layers within a dielectric structure over a semiconductor substrate and a conductive bump disposed over the dielectric structure and configured to be coupled to an additional substrate of a multi-dimensional chip. A substrate metrology module has an optical component and is configured to measure one or more dimensions of the conductive bump. A position control element is configured to move the optical component. A feed-forward path is coupled between an output of the substrate warpage measurement module and an input of the position control element.
A substrate metrology system, comprising:
A substrate metrology system, comprising:
A method, comprising:
Dependencies are inferred from the claim text.