Headerless word line driver with shared wordline underdrive control

An integrated circuit comprising:

• a word line underdrive circuit coupled between a first node and a ground node;
• a plurality of word line driver circuits receiving respective word line input signals and supplying word line driver output signals to respective word lines;
• and
• each of the word line driver circuits receiving one of the word line input signals and supplying one of the word line driver output signals and each of the word line driver circuits including a transistor having a first current carrying terminal coupled to the one of the word line driver output signals and a second current carrying terminal coupled to the first node and wherein a gate of the transistor is coupled to receive the one of the word line input signals.

A method comprising:

• supplying a word line driver circuit with a word line input signal and supplying a word line driver output signal to a word line from the word line driver circuit;
• supplying a gate of a transistor with the word line input signal, the transistor being on while the word line is asserted and the transistor being off while the word line is deasserted;
• and
• reducing a voltage of the word line by providing a path from the word line to a ground node through the transistor while the word line is asserted, the path including a word line underdrive circuit coupled between the transistor and the ground node.