Memory device with strap cells
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJonathan Tsung-Yung Chang, Cheng-Hung Lee, Chi-Ting Cheng, Hung-Jen Liao, Jhon-Jhy Liaw, Yen-Huei Chen
Life of this patent
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Abstract
A device includes a memory array. The memory array includes a first sub-bank, a second sub-bank, a strap cell and a continuous data line. The strap cell is arranged between the first sub-bank and the second sub-bank. The continuous data line includes a first portion coupled to the first sub-bank and a second portion disposed across the second sub-bank. The first portion of the continuous data line and the second portion of the continuous data line are disposed at separate layers above the strap cell.
Claims20
A device, comprising:
- a memory array including:
- a first sub-bank;
- a second sub-bank;
- a strap cell arranged between the first sub-bank and the second sub-bank;
- and
- a continuous data line comprising a first portion coupled to the first sub-bank and a second portion disposed across the second sub-bank,
- wherein the first portion of the continuous data line and the second portion of the continuous data line are disposed at separate layers and are disposed above the strap cell.
A device, comprising:
- a first memory cell of a first sub-bank in a memory array;
- a second memory cell of a second sub-bank in the memory array;
- and
- a first power line comprising a first portion coupled to the first memory cell and a second portion coupled to the second memory cell, wherein the first portion of the first power line and the second portion of the first power line are configured to separately transmit at least one system voltage to the first memory cell and the second memory cell.
A method, comprising:
- arranging a strap cell between a first sub-bank of a memory array and a second sub-bank of the memory array;
- implementing a first portion of a power line, which is coupled to the first sub-bank, and a second portion of the power line, which is coupled to the second sub-bank, in separate conductive layers located above the strap cell;
- and
- implementing a first portion of a first data line on the first sub-bank and a second portion of the first data line on the second sub-bank, wherein the first portion of the first data line and the second portion of the first data line are configured to transmit a first data stored in the first sub-bank and a second data stored in the second sub-bank, respectively, to an input/output (I/O) circuit.
Dependencies are inferred from the claim text.