Shift-buffer circuit, gate driving circuit, display panel and driving method

A shift-buffer circuit, comprising:

• a shift register and a plurality of buffers connected with the shift register, wherein:
• the shift register comprises a shift output terminal;
• the shift register is configured to output a shift output signal from the shift output terminal, in response to a shift clock signal;
• each of the buffers comprises a buffer input terminal and a buffer output terminal, the buffer input terminal being connected with the shift output terminal;
• and
• each of the buffers is configured to output a buffer output signal from the buffer output terminal, in response to a buffer clock signal,
• wherein each of the buffers comprises:
• a buffer input circuit, connected with the buffer input terminal and a buffer pull-up node respectively;
• a first buffer reset circuit, connected with the buffer pull-up node, a first buffer pull-down node and a second power supply terminal respectively;
• a buffer output circuit, connected with the buffer pull-up node, a buffer clock signal terminal and the buffer output terminal respectively;
• a first buffer output pull-down circuit, connected with the buffer output terminal, the first buffer pull-down node and the second power supply terminal respectively;
• and
• a buffer storage capacitor, connected with the buffer pull-up node and the buffer output terminal respectively.