Graphics processing integrated circuit package

A system comprising:

• one or more processors;
• a memory for storage of data;
• and
• an integrated circuit (IC) package including:
• a graphics processing unit (GPU),
• a silicon bridge mounted below the GPU in the IC package, the GPU being mounted on the silicon bridge,
• one or more arithmetic logic units (ALUs) within the silicon bridge,
• a stack of one or more high bandwidth memory (HBM) devices mounted on the silicon bridge, the silicon bridge to connect the HBM devices with the GPU;
• and
• a circuit within the silicon bridge to decode HBM instructions to generate atomic operations;
• wherein the one or more silicon bridge ALUs are to perform one or more atomic operations, the one or more atomic operations to be generated by the silicon bridge circuit and provided to the one or more silicon bridge ALUs upon receipt of an HBM instruction from the GPU, the HBM instruction including an HBM memory address and specifying the one or more atomic operations to be performed.