Data copying method, direct memory access controller, and computer system
AssigneeHuawei Technologies Co., Ltd.
InventorFei Shao
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Abstract
The present invention provides a data copying method, a direct memory access controller, and a computer system. The data copying method of embodiments of the present invention includes reading, by a DMA controller, target data from storage space corresponding to a source physical address of the target data by using an ACP, where the storage space corresponding to the source physical address includes a first buffer; and storing, by the DMA controller, the target data into storage space corresponding to a destination physical address of the target data by using the ACP, where the storage space corresponding to the destination physical address includes a second buffer. The embodiments of the present invention can lower CPU usage.
Claims9
A method for copying a target data from a first storage space corresponding to a first buffer to a second storage space corresponding to a second buffer, the method comprising:
- reading, by a direct memory access (DMA) controller communicating with the first buffer using an accelerator coherency port (ACP), the target data from the first storage space corresponding to a source physical address;
- and
- storing, by the DMA controller communicating with the second buffer using the ACP, the target data obtained during the reading into the second storage space corresponding to a destination physical address,
- wherein the source physical address corresponds to the first buffer,
- wherein the destination physical address corresponds to the second buffer, and
- wherein a processor cache memory comprises the first buffer and the second buffer.
A direct memory access (DMA) controller configured for copying a target data from a first storage space corresponding to a first buffer to a second storage space corresponding to a second buffer, comprising:
- a read module, configured to read, by communicating with the first buffer using an accelerator coherency port (ACP), the target data from the first storage space corresponding to a source physical address;
- and
- a write module, configured to store, communicating with the second buffer using the ACP, the target data into the second storage space corresponding to a destination physical address,
- wherein the source physical address corresponds to the first buffer,
- wherein the destination physical address corresponds to the second buffer, and
- wherein a processor cache memory comprises the first buffer and the second buffer.
A computer system, comprising:
- a direct memory access (DMA) controller,
- an accelerator coherency port (ACP), and
- a processor cache memory comprising a first buffer and a second buffer,
- wherein the DMA controller is communicatively connected to the processor cache memory by using the ACP;
- and
- wherein the DMA controller is configured to carry out a method for copying a target data from a first storage space corresponding to the first buffer to a second storage space corresponding to the second buffer, the method comprising:
- reading, by the direct memory access (DMA) controller communicating with the first buffer using an accelerator coherency port (ACP), the target data from the first storage space corresponding to a source physical address;
- and
- storing, by the DMA controller communicating with the second buffer using the ACP, the target data obtained during the reading into a second storage space corresponding to a destination physical address,
- wherein the source physical address corresponds to the first buffer,
- wherein the destination physical address corresponds to the second buffer, and
- wherein a processor cache memory comprises the first buffer and the second buffer.
Dependencies are inferred from the claim text.