TLB shootdowns for low overhead

A system for directing and tracking translation lookaside buffer (TLB) shootdowns within hardware, the system comprising:

• one or more processors, each processor comprising one or more processor cores, wherein the one or more processors are configured to:
• determine that a process executing on a first processing core causes one or more virtual memory pages to become disassociated with one or more previously associated physical memory addresses;
• generate a TLB shootdown request;
• and
• transmit the TLB shootdown request to others of the one or more processing cores, the TLB shootdown request comprising:
• a shootdown address indicating the disassociated virtual memory page or pages to be flushed from the respective TLBs of the other processing cores,
• a notification address indicating where the other processing cores may acknowledge completion of the TLB shootdown request, and
• identification information, wherein the identification information comprises an identifier for components including one or more advanced programmable interrupt controller IDs (APICIDs), one or more virtual processor IDs (VPIDs), and one or more a process-context identifiers (PCIDs), wherein the components comprise one or more of a VM, a VCPU within the VM, a processor core, and a process executed within a VCPU or processor core.

A non-transitory computer readable medium on which instructions are stored, the instructions, when executed by one or more processors, each processor comprising one or more processor cores, cause the one or more processors to perform a method directing and tracking translation lookaside buffer (TLB) shootdowns within hardware, the method comprising:

• determining that a process executing on a first processing core causes one or more virtual memory pages to become disassociated with one or more previously associated physical memory addresses;
• generating a TLB shootdown request;
• transmitting the TLB shootdown request to others of the one or more processing cores, the TLB shootdown request comprising:
• a shootdown address indicating the disassociated virtual memory page or pages to be flushed from the respective TLBs of the other processing cores,
• a notification address indicating where the other processing cores may acknowledge completion of the TLB shootdown request, and
• identification information, wherein the identification information comprises an identifier for components including one or more advanced programmable interrupt controller IDs (APICIDs), one or more virtual processor IDs (VPIDs), and one or more a process-context identifiers (PCIDs), wherein the components comprise one or more of a VM, a VCPU within the VM, a processor core, and a process executed within a VCPU or processor core.