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US 10,540,277 B2Granted
Method and apparatus for supporting the use of interleaved memory regions
AssigneesSTMicroelectronics (Grenoble 2) SAS, STMicroelectronics S.r.l.
InventorsMichael Soulie, Riccardo Locatelli, Valerio Catalano, Giuseppe Maruccia, Giuseppe Guarnaccia, Raffaele Guarrasi
Life of this patent
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Abstract
A method comprising: receiving a transaction associated with an address and having a transaction destination, said address being in an interleaved region of a memory; determining one of a plurality of destinations for said transaction, different parts of said interleaved memory region being respectively accessible by said plurality of destinations; and associating routing information to said transaction, said routing information associated with the determined destination.
Claims40
A method comprising:
- receiving a transaction associated with an address, the transaction having a transaction destination, said address identifying a location in an interleaved region of a memory;
- determining one of a plurality of destinations for said transaction, different parts of said interleaved memory region being respectively accessible by said plurality of destinations;
- associating routing information to said transaction, said routing information associated with the determined one of the plurality of destinations;
- and
- accessing a memory location associated with said address, wherein said determined one of the plurality of destinations is different from the transaction destination and the method comprises using the address associated with the transaction at said determined destination to access said memory location associated with said address, wherein,
- the interleaved memory region is defined by a step size representing a size of an address range that is contiguously mapped;
- determining one of said plurality of destinations is dependent on one or more of the address, the step size, the number of destinations and an offset;
- and
- said determining one of said plurality of destinations comprises:
- calculating the determined one of the plurality of destinations as:
- (the address[log 2(MCChS)−1, log 2(the step size)]+the offset) modulo the number of destinations, where MCChS is a maximum common channel size.
8 more elements
A method, comprising:
- receiving a transaction associated with an address, the transaction having a transaction destination, said address identifying a location in an interleaved region of a memory;
- determining one of a plurality of destinations for said transaction, different parts of said interleaved memory region being respectively accessible by said plurality of destinations;
- associating routing information to said transaction, said routing information associated with the determined one of the plurality of destinations;
- and
- accessing a memory location associated with said address, wherein said determined one of the plurality of destinations is different from the transaction destination and the method comprises using the address associated with the transaction at said determined destination to access said memory location associated with said address, wherein,
- the interleaved memory region is defined by a step size representing a size of an address range that is contiguously mapped;
- determining one of said plurality of destinations is dependent on one or more of the address, the step size, the number of destinations and an offset;
- and
- determining one of said plurality of destinations comprises:
- if the number of destinations is a power of 2, calculating the determined one of the plurality of destinations as:
- (the address[log 2(the step size)+log 2(the number of destinations)−1, log 2(the step size)]+the offset) modulo the number of destinations.
8 more elements
An apparatus, comprising:
- an input configured to receive a transaction associated with an address, the address having a transaction destination, said address identifying a location in an interleaved region of a memory;
- and
- a controller, said controller configured to:
- determine one of a plurality of destinations for said transaction, different parts of said interleaved memory region being respectively accessible by said plurality of destinations;
- associate routing information to said transaction, said routing information associated with the determined one of the plurality of destinations;
- and
- access a memory location associated with said address, wherein said determined one of the plurality of destinations is different from the transaction destination and said one of the plurality of destinations is arranged to use the address associated with the transaction at said determined destination to access said memory location associated with said address, wherein,
- the interleaved memory region is defined by a step size representing a size of an address range that is contiguously mapped;
- said controller is configured to determine the one of said plurality of destinations dependent on one or more of the address, the step size, the number of destinations and an offset;
- and
- said controller is configured to determine the one of said plurality of destinations, when the number of destinations is a power of 2, as:
- (the address[log 2(the step size)+log 2(the number of destinations)−1, log 2(the step size)]+the offset) modulo the number of destinations.
9 more elements
An apparatus, comprising:
- an input configured to receive a transaction associated with an address, the address having a transaction destination, said address identifying a location in an interleaved region of a memory;
- and
- a controller, said controller configured to:
- determine one of a plurality of destinations for said transaction, different parts of said interleaved memory region being respectively accessible by said plurality of destinations;
- associate routing information to said transaction, said routing information associated with the determined one of the plurality of destinations;
- and
- access a memory location associated with said address, wherein said determined one of the plurality of destinations is different from the transaction destination and said one of the plurality of destinations is arranged to use the address associated with the transaction at said determined destination to access said memory location associated with said address, wherein,
- the interleaved memory region is defined by a step size representing a size of an address range that is contiguously mapped;
- said controller is configured to determine the one of said plurality of destinations dependent on one or more of the address, the step size, the number of destinations and an offset;
- and
- said controller is configured to determine the one of said plurality of destinations as:
- (the address[log 2(MCChS)−1, log 2(the step size)]+the offset) modulo the number of destinations, where MCChS is a maximum common channel size.
9 more elements
A computer aided design tool configured to perform a method to configure a device, the method comprising:
- generating computer code to represent a default version of the device;
- modifying the computer code to configure the device to receive a transaction associated with an address, the transaction having a transaction destination, said address identifying a location in an interleaved region of a memory;
- modifying the computer code to configure the device to determine one of a plurality of destinations for said transaction, different parts of said interleaved memory region being respectively accessible by said plurality of destinations;
- modifying the computer code to associate routing information to said transaction, said routing information associated with the determined one of the plurality of destinations;
- modifying the computer code to configure the device to access a memory location associated with said address, wherein said determined one of the plurality of destinations is different from the transaction destination and the accessing the memory location comprises using the address associated with the transaction at said determined destination to access said memory location associated with said address;
- and
- modifying the computer code to configure the device to calculate the determined one of the plurality of destinations as:
- (the address[log 2(MCChS)−1, log 2(a step size)]+an offset) modulo the number of destinations, where MCChS is a maximum common channel size.
5 more elements
A computer aided design tool configured to perform a method to configure a device, the method comprising:
- generating computer code to represent a default version of the device;
- modifying the computer code to configure the device to receive a transaction associated with an address, the transaction having a transaction destination, said address identifying a location in an interleaved region of a memory;
- modifying the computer code to configure the device to determine one of a plurality of destinations for said transaction, different parts of said interleaved memory region being respectively accessible by said plurality of destinations;
- modifying the computer code to associate routing information to said transaction, said routing information associated with the determined one of the plurality of destinations;
- modifying the computer code to configure the device to access a memory location associated with said address, wherein said determined one of the plurality of destinations is different from the transaction destination and the accessing the memory location comprises using the address associated with the transaction at said determined destination to access said memory location associated with said address;
- and
- modifying the computer code to configure the device to calculate, if the number of destinations is a power of 2, the determined one of the plurality of destinations as:
- (the address[log 2(a step size)+log 2(the number of destinations)−1, log 2(the step size)]+an offset) modulo the number of destinations.
5 more elements
Dependencies are inferred from the claim text.