Accuracy sensitive performance counters

A computer-implemented method for measuring hardware performance, the method comprising:

• receiving an indication of a start to a hardware operation;
• counting, in a pre-counter, a number of clock cycles occurring from the start of the hardware operation to a completion of the hardware operation, wherein the pre-counter is a register and the number of clock cycles is stored in the pre-counter in a binary format;
• defining, in the pre-counter, a first region comprising a first set of bit locations, a second region comprising a second set of bit locations, and a third region comprising a third set of bit locations;
• based at least in part on a first binary value in the first set of bit locations being equal to zero, writing the second set of bit locations and the third set of bit locations to a first accumulator;
• and
• based at least in part on the first binary value in the first set of bit locations being greater than zero, writing the first set of bit locations and the second set of bit locations to a second accumulator.

A system for measuring hardware performance, the system comprising a processor, a pre-counter, a multiplexer, and a sample buffer, the processor configured to:

• receive an indication of a start to a hardware operation;
• count, in the pre-counter, a number of clock cycles occurring from the start of the hardware operation to a completion of the hardware operation, wherein the pre-counter is a register and the number of clock cycles is stored in the pre-counter in a binary format;
• define, in the pre-counter, a first region comprising a first set of bit locations, a second region comprising a second set of bit locations, and a third region comprising a third set of bit locations;
• based at least in part on a first binary value in the first set of bit locations being equal to zero, setting a granularity flag in a sample buffer to zero and writing the second set of bit locations and the third set of bit locations to the sample buffer;
• and
• based at least in part on the first binary value in the first set of bit locations being greater than zero, setting the granularity flag in a sample buffer to one and writing the first set of bit locations and the second set of bit locations to the sample buffer.