JTAG lockout with dual function communication channels
AssigneeHamilton Sundstrand Corporation
InventorsKirk A. Lillestolen, Kanwalpreet Reen
Life of this patent
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Abstract
A Joint Test Action Group (JTAG) communication lockout processor is disclosed. The processor is configured to generate a unlock sequence based on an operational mode change of an operably connected programmable device, and save the unlock sequence to one or more memory registers. The processor can also receive an execution of the unlock sequence via a dual function JTAG communication bus, determine, via an unlock logic, whether the execution of the unlock sequence is valid, and responsive to determining that the execution of the unlock sequence is valid, allow or disallow the JTAG communication with an embedded processor.
Claims17
A Joint Test Action Group (JTAG) lockout assembly for a programmable device comprising:
- an embedded processor in the programmable device;
- a lockout processor operatively connected to the embedded processor, wherein the lockout processor comprises an unlock logic configured to allow or disallow JTAG communication with the embedded processor based on an unlock sequence operational across a dual function JTAG communication bus;
- and
- a test interface operatively connected to the embedded processor and the lockout processor, the test interface configured to cause an unlock controller to:
- retrieve an unlock sequence on the JTAG communication bus from one or more memory registers via a lockout controller operating on the test interface;
- and
- execute the unlock sequence across the JTAG communication bus;
- and
- access the programmable device through the JTAG communication bus responsive to executing the unlock sequence,
- wherein the JTAG communication bus is configured for dual functions comprising JTAG communication and unlock communication,
- wherein the unlock sequence is saved to a plurality of predetermined memory register locations, wherein each of the predetermined memory register locations comprises a predetermined portion of the unlock sequence.
A Joint Test Action Group (JTAG) lockout processor configured to:
- connect a test interface to an embedded processor;
- receive an unlock sequence on a dual function JTAG communication bus;
- validate the unlock sequence;
- and
- allow or disallow JTAG communication to one or more of a programmable device and the embedded processor,
- wherein the unlock sequence is saved to a plurality of predetermined memory register locations, wherein each of the predetermined memory register locations comprises a predetermined portion of the unlock sequence.
A method for Joint Test Action Group (JTAG) lockout for a programmable device on an aircraft comprising:
- connecting a lockout processor to an embedded processor in a programmable device configured to control a portion of the aircraft;
- configuring the lockout processor with an unlock logic to allow or disallow JTAG communication with a JTAG communication bus;
- connecting a test interface to the programmable device and the lockout processor via the JTAG communication bus;
- and
- connecting the unlock logic to a plurality of memory registers and configuring the unlock logic to save an unlock sequence to a predetermined memory register location at each change in the operational mode of the programmable device,
- wherein the unlock sequence is saved to a plurality of predetermined memory register locations, wherein each of the predetermined memory register locations comprises a predetermined portion of the unlock sequence.
Dependencies are inferred from the claim text.