Circuit design verification in a hardware accelerated simulation environment using breakpoints

A system, comprising:

• a processor;
• and
• a memory, storing program code, which when executed on the processor, performs an operation of circuit design verification, the operation comprising:
• generating a breakpoint within a hardware accelerated simulator;
• registering a callback function associated with the breakpoint, the callback function configured to execute in response to an occurrence of the associated breakpoint at the hardware-accelerated simulator;
• simulating, by the hardware-accelerated simulator, execution of a circuit design;
• and
• responsive to triggering the breakpoint at the hardware-accelerated simulator, pausing the execution of the circuit design at the hardware accelerated simulator, transferring control of the simulating from the hardware-accelerated simulator to the computing system, and executing the callback function associated with the breakpoint.

A computer readable storage medium having stored thereon instructions that when executed by a processor causes a processor to perform an operation for circuit design verification, comprising:

• generating a breakpoint within a hardware-accelerated simulator;
• registering a callback function associated with the breakpoint, the callback function configured to execute in response to an occurrence of the associated breakpoint at the hardware-accelerated simulator;
• simulating, by the hardware-accelerated simulator, execution of a circuit design;
• and
• responsive to triggering the breakpoint at the hardware-accelerated simulator, pausing the execution of the circuit design at the hardware-accelerated simulator, transferring control of the simulating from the hardware-accelerated simulator to the computing system, and executing the callback function associated with the breakpoint.