US 10,539,613 B2 · Analog circuit fault diagnosis method using single testable node

Abstract

An analog circuit fault diagnosis method using a single testable node comprises the following steps: (1) obtaining prior sample data vectors under each fault mode; (2) computing a statistical average of the prior sample data vectors under each of the fault modes; (3) decomposing a signal by an orthogonal Haar wavelet filter set; (4) extracting the feature factor of the prior sample fault modes; (5) extracting a fault-mode-to-be-tested feature factor; (6) computing a correlation coefficient matrix and correlation metric parameters between the feature factor of the prior sample fault modes and the feature factor of the fault-mode-to-be-tested; and (7) determining a fault mode according to a maximal correlation principle by comparing the correlation metric parameters. The method can convert a single signal into a plurality of signals without losing original measurement information, and extract an independent fault mode feature factor reflecting variations of a circuit structure in different fault modes, can be used to study an associated mode determination rule and successfully complete classification of circuit fault modes.

An analog circuit fault diagnosis method using a single testable node, comprising:

(1) obtaining prior sample data vectors under each of fault modes:
obtaining M groups of voltage sample vectors Vij of an analog circuit under test under each of the fault modes Fi by using computer simulation software, wherein i=1, 2, . . . , N, j=1, 2, 3, . . . , M, N is a total number of the fault modes of the circuit, i represents that the circuit works under a ith fault mode, j is a jth collected sample, and Vij represents a jth voltage sample vector collected when the circuit works under a ith fault mode;
(2) computing a statistical average
V
i
=
∑
j
=
1
M
⁢
V
ij
/
M
of the prior sample data vectors under each of the fault modes, wherein i=1, 2, . . . , N, and Vi is voltage sample statistical average vectors when the circuit works under the fault modes Fi;
(3) decomposing a signal by an orthogonal Haar wavelet analysis filter set:
decomposing the voltage sample statistical average vectors Vi under each of the fault modes into (K+1) filter output signals by a K-layer orthogonal Haar wavelet filter set;
(4) extracting feature factors of prior sample fault modes:
extracting (K+1) feature factors si,d of the prior sample fault modes through processing the (K+1) filter output signals under the fault modes Fi by using a blind source processing technology, wherein d represents a serial number of fault feature factors, and d=1, 2, . . . , K+1, and si,d represents a dth feature factor of the prior sample fault modes of a voltage sample signal under the fault mode Fi;
(5) extracting feature factors of a fault-mode-to-be-tested:
collecting M groups of voltage testable vectors of the analog circuit under the fault-mode-to-be-tested, computing a statistical average of the voltage testable vectors, decomposing by the orthogonal Haar wavelet filter set in the step (3), and obtaining (K+1) feature factors sT,h of the voltage testable vectors under the fault-mode-to-be-tested through the blind source processing technology in step (4), wherein T represents to-be-tested, which is the first letter of Test, and is intended to distinguish the fault-mode-to-be-tested and the prior sample fault modes;
h represents a serial number of the feature factors, h=1, 2, . . . , K+1, and sT,h represents a hth feature factor of a voltage testable signal under the fault-mode-to-be-tested;
(6) computing a correlation coefficient matrix Ri and correlation metric parameters δi between the feature factors of the fault-mode-to-be-tested and the feature factors of the prior sample fault modes all the fault modes Fi;
R
i
=
[
ρ
11
ρ
12
⋯
ρ
1
⁢
(
K
+
1
)
ρ
21
ρ
22
⋯
ρ
2
⁢
(
K
+
1
)
⋮
⋮
⋮
⋮
ρ
(
K
+
1
)
⁢
1
ρ
(
K
+
1
)
⁢
2
⋯
ρ
(
K
+
1
)
⁢
(
K
+
1
)
]
,
⁢
δ
i
=
∑
h
=
1
K
+
1
⁢
(
Max
d
⁡
(
ρ
hd
)
)
,
wherein ρhd=E((sT,h−E(sT,h))·(si,d−E(si,d))), i=1, 2, . . . , N, E(⋅) represents to determine an expected value, sT,h (h=1, 2, . . . , K+1) represents the hth feature factor of the voltage testable signal under the fault-mode-to-be-tested, si,d (h=1, 2, . . . , K+1) represents the dth feature factor of the prior sample fault modes of the voltage sample signal under the fault mode Fi, the physical meaning of ρhd is a correlation coefficient between the hth feature factor of the voltage testable signal under the fault-mode-to-be-tested and the dth feature factor of the prior sample fault modes of the voltage sample signal under the fault mode Fi;
Max
d
⁡
(
ρ
hd
)
represents the maximum ρhd when h is constant and d=1, 2, . . . , (K+1);
and
(7) comparing all the δi and determining the fault-mode-to-be-tested of the analog circuit is a kth fault mode if
k
=
Index
⁡
(
Max
i
⁡
(
δ
i
)
)
,
wherein i=1, 2, . . . , N, and Index(⋅) represents to calculate an index.

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Analog circuit fault diagnosis method using single testable node

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Analog circuit fault diagnosis method using single testable node

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Abstract

Claims5