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US 10,539,610 B2Granted
Chip package test system
AssigneeXilinx, Inc.
InventorsMohsen H. Mardi, David M. Mahoney
Life of this patent
Estimating the term…
Abstract
An integrated chip package assembly test system and method for testing a chip package assembly are described herein. In one example, an integrated circuit chip package test system includes a socket and a workpress. The socket is configured to receive a chip package assembly for testing in the test system. The workpress is positioned over the socket and has a bottom surface that is dynamically conformable to a multi-planar top surface topography of the chip package assembly.
Claims19
An integrated circuit chip package test system comprising:
- a socket configured to receive a chip package assembly for testing;
- and
- a workpress positioned over the socket, the workpress having a bottom that is dynamically conformable to a multi-planar top surface topography of the chip package assembly, wherein the workpress further comprises:
- a plurality of pusher pins, each pusher pin having a tip protruding through the bottom surface of the workpress, the tips of the plurality of pusher pins defining the bottom surface of the workpress.
1 more element
A method for testing a chip package, the method comprising:
- moving a bottom surface of a workpress defined by a plurality of pusher pins against a multi-planar top surface topography of a chip package assembly disposed in a socket of an automated test system;
- dynamically conforming the bottom surface of the workpress to the multi-planar top surface topography of the chip package assembly as the workpress moves towards the socket;
- and
- testing the chip package utilizing signals transmitted through the socket to the chip package assembly.
1 more element
Dependencies are inferred from the claim text.