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US 10,539,594 B2Granted
Detecting power supply sag in an integrated circuit
AssigneeTexas Instruments Incorporated
InventorGary Lynn Swoboda
Life of this patent
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Abstract
An integrated circuit is provided with a voltage sag detector (VSD) within the integrated circuit package. The VSD is coupled to a voltage reference and to the power distribution bus within the integrated circuit. The VSD has an output for indicating when a voltage level on the power distribution bus sags below a voltage level provided by the voltage reference.
Claims6
A packaged integrated circuit, comprising:
- (a) a semiconductor substrate carrying circuitry, a voltage lead and a ground lead;
- (b) encapsulating material encapsulating the semiconductor substrate;
- (c) an array of connectors on only one side of the encapsulating material that are coupled to the circuitry, the voltage lead, and the ground lead;
- and
- (d) the circuitry including a voltage sag detector that includes:
- i. a voltage reference having a reference voltage output;
- ii. a comparator having an input connected to the reference voltage output, an input coupled to the internal power bus, and a comparator output;
- iii. a latch having an input coupled to the comparator output and a latch output;
- and
- iv. a sticky register having an input coupled to the latch output and having a sticky register output, the sticky register retaining an output of the latch in the event of a reset of the circuitry.
7 more elements
Dependencies are inferred from the claim text.