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US 10,530,393 B2Granted
Configurable ECC decoder
AssigneeWestern Digital Technologies, Inc.
InventorsYuri Ryabinin, Yan Dumchin
Life of this patent
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Abstract
A device includes a low density parity check (LDPC) decoder that is configured to receive a representation of a codeword. The LDPC decoder includes a circuit configured to set a message length of a decoding message at least partially based on an error metric associated with the representation of the codeword. The LDPC decoder also includes a processing unit including a first group of components and a second group of components. The processing unit configured to selectively couple the first group of components to the second group of components based on the message length of the decoding message.
Claims16
A method comprising:
- at a device including a non-volatile memory and a low density parity check (LDPC) decoder, performing:
- receiving, at the LDPC decoder, a codeword from the non-volatile memory;
- setting a message length of decoding messages at least partially based on a syndrome weight of the codeword;
- selectively coupling a first group of serially-coupled adders of the LDPC decoder to a second group of serially-coupled adders of the LDPC decoder based on the message length;
- adding multiple pairs of the decoding messages in parallel per clock cycle of a decoding clock with the first group of serially-coupled adders and the second group of serially-coupled adders when the first group of serially-coupled adders is not coupled to the second group of serially-coupled adders;
- and
- adding a single pair of the decoding messages per clock cycle of the decoding clock with the first group of serially-coupled adders and the second group of serially-coupled adders when the first group of serially-coupled adders is coupled to the second group of serially-coupled adders.
4 more elements
A device comprising:
- a non-volatile memory;
- and
- a low density parity check (LDPC) decoder configured to receive a representation of a codeword from the non-volatile memory, the LDPC decoder comprising:
- a decoding clock;
- a circuit configured to set a message length of decoding messages at least partially based on a syndrome weight of the codeword;
- and
- a processing unit including first serially-coupled adding units and second serially-coupled adding units, the processing unit configured to
- selectively couple the first serially-coupled adding units to the second serially-coupled adding units based on the message length of the decoding messages,
- add multiple pairs of the decoding messages in parallel per clock cycle of the decoding clock with the first serially-coupled adding units and the second serially-coupled adding units when the first serially-coupled adding units are not coupled to the second serially-coupled adding units, and
- add a single pair of the decoding messages per clock cycle of the decoding clock with the first serially-coupled adding units and the second serially-coupled adding units when the first serially-coupled adding units are coupled to the second serially-coupled adding units.
7 more elements
An apparatus comprising:
- means for storing data;
- and
- means for low density parity check (LDPC) decoding a representation of a codeword from the means for storing data, the means for LDPC decoding comprising:
- means for setting a message length of decoding messages at least partially based on a syndrome weight of the codeword;
- and
- means for selectively coupling a first means for adding to a second means for adding based on the message length;
- means for adding multiple pairs of the decoding messages in parallel per clock cycle of a decoding clock with the first means for adding and the second means for adding when the first means for adding are not coupled to the second means for adding;
- and
- means for adding a single pair of the decoding messages per clock cycle of the decoding clock with the first means for adding and the second means for adding when the first means for adding are coupled to the second means for adding.
6 more elements
Dependencies are inferred from the claim text.