DRAM device with embedded flash memory for redundancy and fabrication method thereof

A method for fabricating a dynamic random access memory (DRAM) device with an embedded flash memory, comprising:

• providing a semiconductor substrate having a DRAM array region and a peripheral region, wherein the peripheral region includes an embedded flash memory forming region and a first transistor forming region;
• forming at least an oxide-nitride-oxide (ONO) layer on the DRAM array region and the peripheral region;
• patterning the ONO layer to form an ONO storage structure in the embedded flash memory forming region and reveal the semiconductor substrate in the first transistor forming region;
• forming a first gate oxide layer on the semiconductor substrate in the first transistor forming region;
• blanket depositing a first gate conductive layer over the DRAM array region and the peripheral region;
• performing a contact hole etching process on the DRAM array region to etch through the first gate conductive layer, the ONO layer and a portion of the semiconductor substrate to form a contact hole;
• blanket depositing a second gate conductive layer over the DRAM array region and the peripheral region and filling the second gate conductive layer into the contact hole to form a contact structure;
• forming a metal layer on the second gate conductive layer;
• and
• patterning the metal layer and the first and second gate conductive layers, thereby forming a flash memory gate on the ONO storage structure in the embedded flash memory forming region, a first transistor gate structure in the first transistor forming region, and at least one bit line in the DRAM array region.