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US 10,522,427 B2Granted
Techniques providing semiconductor wafer grouping in a feed forward process
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsun-Jen Chan, Yh-Hsiu Hsiao, Lu Cheng-Ta, Jian-Hong Wu
Life of this patent
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Abstract
A method for processing a plurality of semiconductor wafers includes acquiring a process parameter measurement for each of the semiconductor wafers, associating each of the semiconductor wafers with one of a plurality of groups based on a respective process parameter measurement for each of the semiconductor wafers, where each respective group corresponds to a respective recipe, and for each one of the groups, processing ones of the semiconductor wafers associated with that group together according to a respective recipe.
Claims20
A method for processing a plurality of semiconductor wafers, the method comprising:
- performing a first fabrication process on each of the semiconductor wafers within a lot according to a first order;
- after the performing of the first fabrication process, acquiring critical dimension data for each of the semiconductor wafers within the lot wherein critical dimension data of a first subset of the semiconductor wafers are measured directly with a measurement tool and critical dimension data of a second subset of the semiconductor wafers are extrapolated from the critical dimension data of the first subset of the semiconductor wafers;
- classifying the semiconductor wafers within the lot into a plurality of groups based on the critical dimension data acquired for each of the semiconductor wafers, each group including one or more semiconductor wafers, wherein each group corresponds to a different process condition;
- and
- performing a second fabrication process on each of the plurality of groups in the lot according to the process condition that corresponds to that group, the second fabrication process being different from the first fabrication process, wherein the performing of the second fabrication process includes, for each one of the groups, processing the semiconductor wafers associated with that group together, such that a second order by which the semiconductor wafers are processed in the second fabrication process is different from the first order.
2 more elements
A method for manufacturing a plurality of semiconductor wafers, the method comprising:
- receiving a lot of semiconductor wafers;
- performing a first fabrication process on the lot of semiconductor wafers using a first processing tool, wherein the first fabrication process is a gate etch process;
- determining a total number of different groups for dividing the semiconductor wafers within the lot, wherein the total number of different groups is defined by a number of different process conditions for performing a subsequent fabrication process different from the first fabrication process, wherein the subsequent fabrication process is a doping process, wherein the different process conditions correspond to different concentrations of a dopant to be applied to each of the semiconductor wafers during the subsequent fabrication process, and wherein the total number of different groups is greater than one;
- after the performing of the first fabrication process, generating process parameter data for each of the semiconductor wafers within the lot based on a measurement acquired for each of the semiconductor wafers, wherein the measurement includes a dimension of gate stacks formed on each of the semiconductor wafers, the process parameter data for a respective semiconductor wafer corresponding to one of the different process conditions in the subsequent fabrication process;
- dividing the lot of semiconductor wafers into the total number of different groups based on the dimension of the gate stacks formed on each of the semiconductor wafers;
- and
- processing the lot of semiconductor wafers group-by-group in the subsequent fabrication process using a second processing tool.
4 more elements
A computer program product having a non-transitory computer readable medium tangibly recording computer program logic for controlling a semiconductor manufacturing process, the computer program product comprising:
- code to analyze critical dimension data for each of a plurality of semiconductor wafers within a lot after performing a first fabrication process to the semiconductor wafers, wherein the first fabrication process is a gate etch process, and wherein the critical dimension data of a first subset of the semiconductor wafers are measured directly with a measurement tool and the critical dimension data of a second subset of the semiconductor wafers are extrapolated from the critical dimension data of the first subset of the semiconductor wafers;
- code to associate each of the semiconductor wafers with one of a plurality of groups based on a range of the critical dimension data, wherein each one of the groups is to be processed with a different recipe in a subsequent processing step, and wherein the different recipe corresponds to a different dopant concentration to be applied to the semiconductor wafers in each one of the groups;
- and
- code to process the semiconductor wafers in the subsequent processing step group-by-group such that at least two semiconductor wafers are processed in the subsequent processing step in an order that is different from an order of the processing of the at least two semiconductor wafers in the first fabrication process.
1 more element
Dependencies are inferred from the claim text.