Polysynchronous stochastic circuits

A method of operating an integrated circuit, wherein the integrated circuit comprises first, second, and third computational units, a central clock, and a clock distribution circuit, the method comprising:

• generating, by the central clock, a central clock signal;
• distributing, by the clock distribution circuit without having timing elements that substantially synchronize arrival of the central clock signal to the second computational unit and the third computational unit, the central clock signal to the second computational unit and the third computational unit as unsynchronized respective input clocks;
• producing, at the second computational unit, one of at least two input stochastic bit streams in accordance with one of the respective input clocks;
• producing, at the third computational unit, another of the at least two input stochastic bit streams in accordance with another of the respective input clocks;
• receiving, at the first computational unit and as inputs, the at least two input stochastic bit streams driven by the respective input clocks that are unsynchronized,
• wherein the at least two input stochastic bit streams received by the first computational unit are misaligned in time in accordance with the unsynchronized respective input clocks of the second computational unit and the third computational unit;
• and
• processing, at the first computational unit, the misaligned input stochastic bit streams to compute a result and produce an output stochastic bit stream representative of the result,
• wherein each of the stochastic bit streams comprises sequential sets of data bits, each of the sets of data bits representing a numerical value based on a probability that any bit in the respective set of data bits is one.