US 10,520,971 B2 · Current sink with negative voltage tolerance

Abstract

A current sink circuit coupled to pull down a gate control node (GCN) for an NMOS power FET that controls an actuator includes first and second NMOS transistors coupled in series between the GCN and a lower rail, where the first NMOS transistor has a gate and drain coupled together through a resistor. The current sink circuit also includes a control signal generation circuit (CSGC) and a negative voltage blocking circuit (NVBC). The CSGC is coupled to receive at least one voltage input and an ignition signal and to provide a first control signal and a second control signal. The NVBC is coupled to pass the first control signal from the control signal generation circuit to the gate of the first NMOS transistor and to block a negative voltage on the GCN from reaching the CSGC. The second control signal is coupled to the gate of the second NMOS transistor.

Claims14

Dependent claims

A circuit comprising:

(a) a gate control node and a lower rail;
(b) a first transistor having a first drain, a first gate, and a first source, the first source being coupled to the gate control node;
(c) a second transistor having a second drain, a second gate, and a second source, the second drain being coupled to the first drain and the second source being coupled to the lower rail;
(d) a first resistor coupled between the first source and the first gate;
(e) control signal generation circuitry having an ignition input, a first power transistor drain input, a first control signal output, and a second control signal output, the second control signal output being coupled to the second gate;
and
(f) a negative voltage blocking circuit having a first control signal input coupled to the first control signal output and having a negative blocked control signal output coupled to the first gate.

4 more elements

A system comprising:

(a) a battery connector, a lower rail connection, and a valve driver output;
(b) a power transistor having a power drain, a power gate, and a power source, the power gate being coupled to a gate control node and the power source being coupled to the valve driver output;
(c) a first transistor having a first drain, a first gate, and a first source, the first source being coupled to the gate control node;
(d) a second transistor having a second drain, a second gate, and a second source, the second drain being coupled to the first drain and the second source being coupled to the lower rail;
(e) a first resistor coupled between the first source and the first gate;
(f) control signal generation circuitry having an ignition input, a first power transistor drain input, a first control signal output, and a second control signal output, the second control signal output being coupled to the second gate;
(g) a negative voltage blocking circuit having a first control signal input coupled to the first control signal output and having a negative blocked control signal output coupled to the first gate;
and
(h) a pull-down current limiting circuit having a second control signal input coupled to the second gate and an input coupled to the first and second drains.

6 more elements

Dependencies are inferred from the claim text.

Current sink with negative voltage tolerance

Life of this patent

Current sink with negative voltage tolerance

Life of this patent

Abstract

Claims14