Optical proximity correction methodology using underlying layer information

A method comprising:

• receiving an integrated circuit (IC) design layout that includes an IC feature, the IC feature configured to be fabricated in a selected portion of a photoresist layer disposed on a substrate;
• generating a rule-biased contour for the IC feature according to a correction map that compensates for optical reflections from an underlying layer disposed on the substrate between the photoresist layer and the substrate;
• computing target points for the IC feature along the rule-biased contour;
• generating a modified IC feature based on the target points, the modified IC feature having an optical proximity correction (OPC) contour;
• and
• providing a modified IC design layout including the modified IC feature for fabricating a mask based on the modified IC design layout.

An integrated circuit (IC) system, comprising:

• a processor;
• a communication module communicatively coupled to the processor and configured to receive an IC design layout that includes an IC feature, wherein the IC feature is to be fabricated in a portion of a first layer disposed on a substrate;
• and
• a non-transitory, computer-readable storage communicatively coupled to the processor and including instructions executable by the processor, the instructions including:
• instructions for determining topographical information of a second layer disposed on the substrate between the first layer and the substrate, wherein the topographical information of the second layer comprises global coordinates of an area in the second layer that reflects radiation toward the portion of the first layer and a pattern density of the area in the second layer;
• and
• instructions for performing an optical proximity correction (OPC) process on the IC feature to generate a modified IC feature with an OPC contour, wherein the generation of the modified IC feature compensates for the topographical information of the second layer.