Method for iterative target location in a multiple receiver target location system
AssigneeZebra Technologies Corporation
InventorsEdward A. Richley, Belinda Turner, Chang Wang
Life of this patent
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AssigneeZebra Technologies Corporation
InventorsEdward A. Richley, Belinda Turner, Chang Wang
Estimating the term…
An disclosed method includes receiving, from receivers, TOA data associated with location tag transmissions; determining a first set of the receivers based on the received TOA data; calculating a first tag location estimate for the first set of the receivers by applying a minimizing function to a first set of the TOA data corresponding to the first set of the receivers; determining a first data quality indicator (DQI) for the first tag location estimate; and when the first DQI for the first tag location estimate does not meet a threshold: determining, for the first set of the TOA data, impacts of respective delays on the minimizing function; determining, based on the impacts of the respective delays on the minimizing function, a second set the receivers different from the first set of the receivers; and calculating a second tag location estimate for the second set of the receivers.
A method for determining target location in a multiple receiver target location system, the multiple receiver target location system including a plurality of location tags each associated with a respective target, receivers, and a central processor, the method comprising:
A computer program product comprising at least one memory having computer-executable program code portions stored therein, the computer-executable program code portions comprising program code instructions configured to, when executed, cause a machine to:
An apparatus for determining target location in a multiple receiver target location system, the multiple receiver target location system including a plurality of location tags each associated with a respective target and a plurality of receivers, the apparatus comprising at least one processor and at least one memory including computer program code, the at least one memory and computer program code configured to, with the processor, cause the apparatus to at least:
Dependencies are inferred from the claim text.