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US 10,520,556 B2Granted
Offset voltage compensation
AssigneeInfineon Technologies AG
InventorJuergen Zimmer
Life of this patent
Estimating the term…
Abstract
A bridge circuit having a full-bridge circuit having a first branch and a second branch coupled in parallel, the first branch comprising a first half-bridge circuit and a first tunnel magnetoresistance (TMR) resistor cascade coupled in series, and the second branch comprising a second half-bridge circuit and a second TMR resistor cascade coupled in series, wherein the full-bridge circuit has an offset voltage of zero or substantially close to zero.
Claims6
A bridge circuit, comprising:
- a full-bridge circuit having a first branch and a second branch coupled in parallel,
- the first branch comprising:
- a first half-bridge circuit comprising a first tunnel magnetoresistance (TMR) resistor and a second TMR resistor;
- and
- a first TMR resistor cascade, which comprises a plurality of TMR resistors none of which form part of the first half-bridge circuit, coupled in series with the first half-bridge circuit;
- a first electrode resistor cascade coupled in series with the first TMR resistor cascade,
- wherein the first TMR resistor cascade has a negative temperature coefficient, and the first electrode resistor cascade has a positive temperature coefficient;
- and
- the second branch comprising:
- a second half-bridge circuit comprising a third TMR resistor and a fourth TMR resistor;
- and
- a second TMR resistor cascade, which comprises a plurality of TMR resistors none of which form part of the first half-bridge circuit, coupled in series with the second half-bridge circuit;
- a second electrode resistor cascade coupled in series with the second TMR resistor cascade,
- wherein the second TMR resistor cascade has a negative temperature coefficient, and the second electrode resistor cascade has a positive temperature coefficient,
- wherein the full-bridge circuit has an offset voltage having an offset temperature coefficient of zero.
12 more elements
A sensor comprising:
- a full-bridge circuit having a first branch and a second branch coupled in parallel,
- the first branch comprising:
- a first half-bridge circuit comprising a first tunnel magnetoresistance (TMR) resistor and a second TMR resistor;
- a first TMR resistor cascade, which comprises a plurality of TMR resistors none of which form part of the first half-bridge circuit, coupled in series with the first half-bridge circuit;
- a first electrode resistor cascade coupled in series with the first TMR resistor cascade,
- wherein the first TMR resistor cascade has a negative temperature coefficient, and the first electrode resistor cascade has a positive temperature coefficient;
- the second branch comprising:
- a second half-bridge circuit comprising a third TMR resistor and a fourth TMR resistor;
- a second TMR resistor cascade, which comprises a plurality of TMR resistors none of which form part of the first half-bridge circuit, coupled in series with the second half-bridge circuit;
- a second electrode resistor cascade coupled in series with the second TMR resistor cascade,
- wherein the second TMR resistor cascade has a negative temperature coefficient, and the second electrode resistor cascade has a positive temperature coefficient,
- wherein the full-bridge circuit has an offset voltage having an offset temperature coefficient of zero.
9 more elements
Dependencies are inferred from the claim text.