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US 10,517,540 B1Granted
Systems and methods to reduce data and complexity in neural signal processing chain
AssigneeHi LLC
InventorsKristopher Anderson, Randal Koene, Antonio H. Lara, John W. Stanton
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Abstract
Described herein are systems and methods for reducing the size of data payloads delivered to downstream processing from a raw series of biological sensor recordings. In one variation, the system comprises a low-power hardware architecture that combines serially sampled neural signal data with a transformation matrix (TFM) using a novel systolic random-logic-macro (RLM) array.
Claims29
A method for detecting neural activity, the method comprising:
- acquiring neural signal data from a plurality of M sensors to generate a data channel vector having M data channels;
- generating a transformation matrix (TFM) comprising an M×N matrix of matrix values, wherein the matrix values are determined by:
- identifying high-noise data channels in the data channel vector with high-noise neural signal data and assigning a zero value to the matrix values in rows of the TFM that correspond to the identified high-noise data channels;
- identifying correlated data channels in the data channel vector that each have correlated neural signal data that is correlated one with neural signal data in one or more other data channels in the data channel vector;
- and
- iterating through the matrix values of the TFM to compute non-zero matrix values for rows of the TFM that correspond to the identified correlated data channels, wherein the non-zero matrix values of the TFM combine the neural signal data of the correlated data channels;
- and
- configuring an array of individually addressable logic blocks to have M×N active logic blocks, where each of the addressable logic blocks comprises a memory element that stores a matrix value of the TFM corresponding to each of the addressable logic blocks;
- and
- generating an output data channel vector having N data elements by multiplying the data channel vector with the TFM using the M×N array of logic blocks.
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A method for acquiring and processing neural signal data acquired by a measurement system, the method comprising:
- acquiring neural signal data from a plurality M of sensors in contact with neural tissue, wherein the neural signal data forms a data channel vector having M channel elements;
- multiplying the data channel vector with a M×N transformation matrix (TFM) of data channel values to remove neural signal data redundancies and noise artifacts, wherein the product is a reduced data vector having N data elements, wherein N<=M;
- and
- transmitting the reduced data vector to an external controller,
- wherein multiplying the data channel vector with the TFM comprises performing systolic matrix multiplication using a logic block array located inside an implanted measurement system controller, wherein the logic block array comprises one logic block per non-zero data channel value of the TFM and each logic block comprises a memory element that stores a non-zero data channel value of the TFM.
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Dependencies are inferred from the claim text.