Stacked photodetector assemblies
AssigneeHi LLC
InventorsRyan Field, Husam Katnani, Bruno Do Valle, Rong Jin, Jacob Dahle
Life of this patent
Estimating the term…
Abstract
An exemplary stacked photodetector assembly includes a first wafer and a second wafer bonded to the first wafer. The first wafer includes a SPAD and has a thickness T1 configured to minimize absorption by the first wafer of photons included in light incident upon the first wafer while the SPAD is in a disarmed state. The second wafer has a thickness T2 configured to provide structural support for the first wafer. The stacked photodetector assembly includes a fast gating circuit electrically coupled to the SPAD and configured to arm and disarm the SPAD.
Claims21
A stacked photodetector assembly comprising:
- a first wafer including a single photon avalanche diode (SPAD), the first wafer having a thickness T1 configured to minimize absorption by the first wafer of photons included in light incident upon the first wafer while the SPAD is in a disarmed state;
- and
- a second wafer having a thickness T2 including a fast gating circuit electrically coupled to the SPAD and configured to arm and disarm the SPAD, the second wafer bonded to the first wafer in a stacked configuration;
- wherein the fast gating circuit includes a capacitor configured to:
- be charged, while the SPAD is in the disarmed state, with a bias voltage by a voltage source, and
- supply, while the SPAD is in an armed state, the bias voltage to the SPAD such that a voltage across the SPAD is greater than a breakdown voltage of the SPAD.
A stacked photodetector assembly comprising:
- a first wafer including
- a single photon avalanche diode (SPAD), and
- a fast gating circuit electrically coupled to the SPAD and configured to arm and disarm the SPAD,
- the first wafer having a thickness T1 configured to minimize absorption by the first wafer of photons included in light incident upon the first wafer while the SPAD is in a disarmed state;
- and
- a second wafer having a thickness T2 bonded to the first wafer in a stacked configuration and configured to provide structural support for the first wafer, the second wafer not including circuitry configured to control the SPAD.
A stacked photodetector assembly comprising:
- a single photon avalanche diode (SPAD);
- a fast gating circuit electrically coupled to the SPAD and configured to arm and disarm the SPAD;
- a first wafer including the SPAD and the fast gating circuit, the first wafer having a thickness T1 configured to minimize absorption of photons included in light incident upon the first wafer while the SPAD is in a disarmed state;
- and
- a handle wafer having a thickness T2 bonded to the first wafer in a stacked configuration.
A stacked photodetector assembly comprising:
- a single photon avalanche diode (SPAD);
- a fast gating circuit electrically coupled to the SPAD and configured to arm and disarm the SPAD;
- a first wafer including the SPAD, the first wafer having a thickness T1 configured to minimize absorption of photons included in light incident upon the first wafer while the SPAD is in a disarmed state;
- and
- a second wafer having a thickness T2 bonded to the first wafer in a stacked configuration;
- wherein the fast gating circuit includes a capacitor configured to:
- be charged, while the SPAD is in the disarmed state, with a bias voltage by a voltage source, and
- supply, while the SPAD is in an armed state, the bias voltage to an output node of the SPAD such that a voltage across the SPAD is greater than a breakdown voltage of the SPAD.
Dependencies are inferred from the claim text.