Analog to digital converter

An analog-to-digital conversion (“ADC”) method, comprising:

• receiving an analog input voltage signal;
• converting the analog input voltage signal to a first number of bits of a first digital value;
• converting the analog input voltage signal to a second number of bits of the first digital value based at least in part on the first number of bits of the first digital value;
• combining the first number of bits and the second number of bits into the first digital value;
• determining an analog residue signal based on a difference between the first digital value and the analog input voltage signal;
• converting the analog residue signal to a third number of bits of a second digital value;
• converting the analog residue signal to a fourth number of bits of the second digital value based at least in part on the third number of bits of the second digital value, wherein the analog residue signal is converted to the third number of bits of the second digital value by a coarse ADC stage, and wherein the analog residue signal is converted to the fourth number of bits of the second digital value by a fine ADC stage, and wherein the fourth number if bits is greater than the third number of bits;
• combining the third number of bits and the fourth number of bits into the second digital value;
• and
• combining the first digital value and the second digital value into a digital output signal representing the analog input voltage signal.

An analog-to-digital converter (“ADC”), comprising:

• an input terminal configured to receive an analog input voltage signal;
• an output terminal configured to output a first digital output signal representing the analog input voltage signal;
• a controller configured to receive a clock signal, wherein the controller is configured to establish first and second operation phases in response to the clock signal;
• a first ADC stage coupled to the input terminal and configured to output a first digital value corresponding to the analog input voltage signal and an analog residue signal corresponding to a difference between the first digital value and the analog input signal;
• a second ADC stage coupled to receive the analog residue signal, the second ADC stage including a coarse stage and a fine stage coupled to receive an output of the coarse stage, the second ADC stage configured to output a second digital value corresponding to the analog residue signal;
• wherein the controller is configured to:
• operate the coarse stage to sample the analog residue signal during the first operation phase;
• operate the fine stage to sample the analog residue signal during the first operation phase;
• operate the coarse stage to convert the analog residue signal to a first number of bits of the second digital output signal during the second operation phase;
• operate the fine stage to convert the analog residue to a second number of bits of the second digital output signal during the second operation phase;
• and
• combine the first number of bits and the second number of bits.