# US 10,504,926 B2 · Thin film transistor, method for fabricating the same, array substrate, and display panel

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- Number: US 10,504,926 B2
- Document ID: US10504926B2
- Status: Granted
- Kind: B2
- Application number: 15/778,719
- Filed: 2017-10-17
- Published: 2018-12-06
- Granted: 2019-12-10
- Earliest claimed: 2016-10-31
- Assignees: Boe Technology Group Co., Ltd.; Hefei Xinsheng Optoelectronics Technology Co., Ltd.
- Applicants: Boe Technology Group Co., Ltd.; Hefei Xinsheng Optoelectronics Technology Co., Ltd.
- Inventors: Qiang Zhou; Chaofan Zhu; Xingfeng Ren
- Web page: https://patentgrep.com/patent/US10504926B2

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H10D 30/0316: {of lateral bottom-gate TFTs comprising only a single gate}
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D 30/675: {Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 86/0212: {comprising manufacture, treatment or coating of substrates}
- H10D 86/0221: {comprising manufacture, treatment or patterning of TFT semiconductor bodies}
- H10D 86/0231: {using masks, e.g. half-tone masks}
- H10D 86/40: characterised by multiple TFTs
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10W 20/074: {of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A thin film transistor, a method for fabricating the same, an array substrate, and a display panel are disclosed. The method includes: forming a semiconductor film comprising metallic elements, an etching stop film, and a source and drain film on a substrate in this order; and forming a pattern comprising an active layer, an etching stop layer, and a source and drain on the active layer by using a same mask plate, wherein the etching stop layer electrically connects the source and drain with the active layer. Since an etching stop film is formed on a semiconductor film comprising metallic elements, during etching the metal layer, the etching stop film can protect the semiconductor film comprising metallic elements from being etched, and this ensures the performance of the resultant active layer.

## Claims

### Claim 1

A method for fabricating a thin film transistor, comprising:
forming a pattern comprising a gate and a gate insulating layer covering the pattern comprising the gate on a substrate;
forming a semiconductor film comprising metallic elements, an etching stop film, and a source and drain film in this order; and
etching the semiconductor film comprising metallic elements, the etching stop film, and the source and drain film by using a same mask plate in a patterning process, to form a pattern comprising an active layer, an etching stop layer, and a source and a drain on the active layer, wherein the etching stop layer electrically connects the source and drain with the active layer,
wherein the etching stop layer comprises a mixture of a non-metal oxide and at least one of graphite, graphene, and a carbon nanomaterial.

### Claim 2 (depends on 1)

The method of claim 1, wherein the step of etching the semiconductor film comprising metallic elements, the etching stop film, and the source and drain film by using a same mask plate in a patterning process, to form the pattern comprising the active layer, the etching stop layer, and the source and the drain on the active layer plate comprises:
coating a photoresist layer on the source and drain film;
exposing and developing the photoresist layer by using a gray tone mask plate, to form a first photoresist completely retained region in a region corresponding to a pattern of source to be formed, forming a second photoresist completely retained region in a region corresponding to a pattern of drain to be formed, forming a photoresist partially retained region in a region between the region corresponding to the pattern of source to be formed and the region corresponding to the pattern of drain to be formed, and forming a photoresist completely removed region surrounding the region corresponding to a pattern of active layer to be formed; and
etching the source and drain film, the etching stop film, and the semiconductor film comprising metallic elements by using the photoresist layer, to form a pattern comprising the source, the drain, and the active layer.

### Claim 3 (depends on 2)

The method of claim 2, wherein the step of etching the source and drain film, the etching stop film, and the semiconductor film comprising metallic elements by using the photoresist layer to form the pattern comprising the source, the drain and the active layer comprises:
wet etching the source and drain film for a first time, to retain the source and drain film in a region corresponding to the first photoresist completely retained region, the second photoresist completely retained region, and the photoresist partially retained region;
dry etching the etching stop film for a first time, to retain the etching stop film in a region corresponding to the first photoresist completely retained region, the second photoresist completely retained region, and the photoresist partially retained region;
ashing the photoresist layer in the first photoresist completely retained region, the second photoresist completely retained region, and the photoresist partially retained region, to completely remove the photoresist layer in the photoresist partially retained region, and thin the photoresist layer in the first photoresist completely retained region and the second photoresist completely retained region;
wet etching the source and drain film for a second time, to retain the source and drain film in a region corresponding to the first photoresist completely retained region and the second photoresist completely retained region, so as to form a pattern comprising source and drain;
wet etching the semiconductor film comprising metallic elements, to retain the semiconductor film comprising metallic elements in a region corresponding to the first photoresist completely retained region, the second photoresist completely retained region, and the photoresist partially retained region, so as to form a pattern comprising active layer;
dry etching the etching stop film for a second time, to remove the etching stop film in a region corresponding to the photoresist partially retained region; and
removing the photoresist layer in the first photoresist completely retained region and the second photoresist completely retained region.

### Claim 4 (depends on 1)

The method of claim 1, wherein
the step of forming the semiconductor film comprising metallic elements, the etching stop film, and the source and drain film in this order, comprises: forming the semiconductor film comprising metallic elements, the etching stop film, and the source and drain film on the substrate on which the pattern comprising the gate and the gate insulating layer have been formed.

### Claim 5 (depends on 1)

The method of claim 1, wherein the semiconductor film comprising metallic elements comprises a metal oxide semiconductor material or a metal-doped semiconductor material.

### Claim 6 (depends on 1)

The method of claim 1, wherein the etching stop film comprises a non-metal dopant.

### Claim 7 (depends on 6)

The method of claim 6, wherein the non-metal dopant is silicon which is doped with one of boron, nitrogen, phosphorus and arsenic, or germanium which is doped with one of boron, nitrogen, phosphorus and arsenic.

### Claim 8 (depends on 1)

The method of claim 1, wherein the etching stop film has a thickness of about 800 Ř3000 Å.

### Claim 9

A thin film transistor, comprising a substrate, a semiconductor active layer comprising metallic elements on the substrate, a source and drain on the active layer, and an etching stop layer between the source and the active layer and between the drain and the active layer, wherein the etching stop layer electrically connects the source and the drain with the active layer, wherein the etching stop layer comprises a mixture of a non-metal oxide and at least one of graphite, graphene, and a carbon nanomaterial.

### Claim 10 (depends on 9)

An array substrate, comprising the thin film transistor of claim 9.

### Claim 11 (depends on 10)

A display device, comprising the array substrate of claim 10.