# US 10,504,925 B2 · Semiconductor device and method for manufacturing semiconductor device

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- Number: US 10,504,925 B2
- Document ID: US10504925B2
- Status: Granted
- Kind: B2
- Application number: 15/667,863
- Filed: 2017-08-03
- Published: 2018-02-08
- Granted: 2019-12-10
- Earliest claimed: 2016-08-08
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Shunpei Yamazaki; Katsuaki Tochibayashi; Kenichi Shiohama
- Web page: https://patentgrep.com/patent/US10504925B2

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6733: {Multi-gate TFTs}
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 30/751: {having composition variations in the channel regions}
- H10D 62/80: characterised by the materials
- H10D 62/8271: {comprising only oxide semiconductor materials heterojunctions, e.g. IGZO/IZO}
- H10D 64/011: {of electrodes ohmically coupled to a semiconductor}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 86/021: {of multiple TFTs}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 87/00: Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10P 50/69: {using masks for semiconductor materials}
- H10P 95/90: Thermal treatments, e.g. annealing or sintering
- H10D 64/518: {characterised by their lengths or sectional shapes}
- H10D 64/519: {characterised by their top-view geometrical layouts}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device having favorable reliability which is capable of retaining data for a long time is provided. The semiconductor device includes a first gate electrode, a first gate insulator over the first gate electrode, a first oxide over the first gate insulator, a second oxide and a third oxide over the first oxide, a first conductor over the second oxide, a second conductor over the third oxide, a fourth oxide over the first oxide, the first conductor, and the second conductor, a second gate insulator over the fourth oxide, and a second gate electrode over the second gate insulator. The first conductor is in contact with a top surface of the second oxide, a side surface of the second oxide that faces the third oxide, and part of a top surface of the first oxide. The second conductor is in contact with a top surface of the third oxide, a side surface of the third oxide that faces the second oxide, and part of the top surface of the first oxide. The fourth oxide is in contact with part of the top surface of the first oxide between the first conductor and the second conductor.

## Claims

### Claim 1

A semiconductor device, comprising:
a first transistor comprising:
a first gate electrode;
a first gate insulator over the first gate electrode;
a first oxide over the first gate insulator;
a second oxide and a third oxide over and in contact with the first oxide;
a first conductor over the second oxide;
a second conductor over the third oxide;
a fourth oxide over the first oxide, the first conductor, and the second conductor;
a second gate insulator over the fourth oxide; and
a second gate electrode over the second gate insulator; and
a second transistor comprising:
a third gate electrode;
a third gate insulator over the third gate electrode;
a fifth oxide over the third gate insulator;
a sixth oxide over and in contact with the fifth oxide;
a third conductor and a fourth conductor over and in contact with the sixth oxide;
a seventh oxide over the sixth oxide, the third conductor, and the fourth conductor;
a fourth gate insulator over the seventh oxide; and
a fourth gate electrode over the fourth gate insulator,
wherein the first conductor is in contact with a first part of a top surface of the first oxide between the second oxide and the third oxide,
wherein the second conductor is in contact with a second part of the top surface of the first oxide between the second oxide and the third oxide,
wherein the fourth oxide is in contact with a third part of the top surface of the first oxide between the first conductor and the second conductor,
wherein the seventh oxide is in contact with a part of the top surface of the sixth oxide between the third conductor and the fourth conductor,
wherein the first oxide, the second oxide, the third oxide, the fourth oxide, the fifth oxide, the sixth oxide and the seventh oxide each contain a metal oxide,
wherein composition of the first oxide is different from composition of the sixth oxide,
wherein a channel formation region of the first transistor is in the first oxide, and
wherein a channel formation region of the second transistor is in the sixth oxide.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the first conductor is in contact with a top surface of the second oxide and a first side surface of the second oxide,
wherein the second conductor is in contact with a top surface of the third oxide and a first side surface of the third oxide, and
wherein the first side surface of the second oxide and the first side surface of the third oxide faces each other.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1,
wherein a bandgap of the fourth oxide is wider than each of a bandgap of the first oxide, a bandgap of the second oxide, and a bandgap of the third oxide,
wherein a bandgap of the seventh oxide is wider than each of a bandgap of the fifth oxide and a bandgap of sixth oxide, and
wherein the bandgap of the first oxide is wider than the bandgap of the sixth oxide.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1,
wherein the first oxide and the fifth oxide have a same composition,
wherein the second oxide, the third oxide, and the sixth oxide have a same composition, and
wherein the fourth oxide and the seventh oxide have a same composition.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein the first oxide, the second oxide, the third oxide, the fifth oxide and the sixth oxide each contain In, Ga and Zn,
wherein the fourth oxide and the seventh oxide each contain Ga,
wherein contents of Ga in each of the fourth oxide and the seventh oxide are larger than contents of Ga in each of the first oxide, the second oxide, the third oxide, the fifth oxide, and the sixth oxide.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1,
wherein the first gate electrode, one of the first conductor and the second conductor, and the third gate electrode are electrically connected to each other.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1,
wherein the first gate electrode, one of the first conductor and the second conductor, the second gate electrode, and the third gate electrode are electrically connected to each other.

### Claim 8 (depends on 1)

The semiconductor device according to claim 1,
wherein a threshold voltage of the first transistor is higher than a threshold voltage of the second transistor.