# US 10,504,914 B2 · Integrated circuit structure and manufacturing method thereof

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- Number: US 10,504,914 B2
- Document ID: US10504914B2
- Status: Granted
- Kind: B2
- Application number: 15/990,696
- Filed: 2018-05-28
- Published: 2019-08-22
- Granted: 2019-12-10
- Earliest claimed: 2018-02-21
- Assignees: Powerchip Semiconductor Manufacturing Corporation
- Applicants: Powerchip Semiconductor Manufacturing Corporation
- Inventors: Zih-Song Wang
- Web page: https://patentgrep.com/patent/US10504914B2

## CPC

- H10B 41/50: characterised by the boundary region between the core region and the peripheral circuit region
- H10B 43/20: characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
- H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10B 43/35: with cell select transistors, e.g. NAND
- H10B 43/50: characterised by the boundary region between the core and peripheral circuit regions
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10D 62/378: {Contact regions to the substrate regions}
- H10W 10/011: {of isolation regions comprising dielectric materials}
- H10W 10/10: Isolation regions comprising dielectric materials
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An integrated circuit structure including a substrate, a stacked structure, and first contacts is provided. The stacked structure is disposed on the substrate and includes first dielectric layers and conductive layers alternately stacked. The stacked structure has openings passing through the conductive layers. The first contacts are located in the openings. Bottoms of the first contacts are located at different heights. The first contacts and the conductive layers are electrically connected in a one-to-one manner. The first contacts and the conductive layers that are not electrically connected to each other are isolated from each other.

## Claims

### Claim 1

An integrated circuit structure, comprising:
a substrate;
a stacked structure, disposed on the substrate and comprising first dielectric layers and conductive layers alternately stacked, wherein the stacked structure has openings passing through the conductive layers;
first contacts, located in the openings, wherein bottoms of the first contacts are located at different heights, the first contacts and the conductive layers are electrically connected in a one-to-one manner, the first contacts and the conductive layers which are not electrically connected to each other are isolated from each other, and the first contacts are not electrically connected to an uppermost layer in the conductive layers;
second dielectric layers, disposed in the openings, wherein the first contacts are located on the second dielectric layers;
third dielectric layers, disposed in the openings and located between the conductive layers and the first contacts, wherein bottoms of the third dielectric layers are located at different heights; and
second contacts, electrically connected to the uppermost layer in the conductive layers and the first contacts respectively.

### Claim 2 (depends on 1)

The integrated circuit structure according to claim 1, wherein a material of the conductive layers comprises doped polycrystalline silicon or metal.

### Claim 3 (depends on 1)

The integrated circuit structure according to claim 1, wherein an arrangement of the first contacts comprises a two-dimensional arrangement or a one-dimensional arrangement.

### Claim 4 (depends on 1)

The integrated circuit structure according to claim 1, further comprising:
isolation layers, wherein each of the isolation layers is disposed between two adjacent first dielectric layers, and a portion of the isolation layers is located between the conductive layers and the third dielectric layers.

### Claim 5 (depends on 1)

The integrated circuit structure according to claim 1, wherein each of the third dielectric layers is further extended between two adjacent first dielectric layers.

### Claim 6 (depends on 1)

The integrated circuit structure according to claim 1, further comprising:
a fourth dielectric layer covering the stacked structure and the first contacts, and the second contacts being located in the fourth dielectric layer.