# US 10,504,879 B2 · Light-emitting component and method for producing a light-emitting component > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,504,879 B2 - Document ID: US10504879B2 - Status: Granted - Kind: B2 - Application number: 15/757,970 - Filed: 2016-09-08 - Published: 2018-09-06 - Granted: 2019-12-10 - Earliest claimed: 2015-09-18 - Assignees: OSRAM Opto Semiconductors GmbH - Applicants: OSRAM Opto Semiconductors GmbH - Inventors: Alexander Martin; Norwin Von Malm - Web page: https://patentgrep.com/patent/US10504879B2 ## CPC - H10W 90/00: Package configurations - H10H 20/813: having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies - H10H 20/857: Interconnections, e.g. lead-frames, bond wires or solder balls - H10H 29/142: {Two-dimensional arrangements, e.g. asymmetric LED layout} - H10H 20/018: {Bonding of wafers} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS ## Abstract The invention relates to a component with at least one optoelectronic semiconductor chip, comprising: a connection substrate, which has an assembly surface and electric contact structures, and a plurality of structured semiconductor units, each of which has a plurality of monolithically connected pixels with a respective active layer that emits light during operation, wherein: the semiconductor units are arranged at a lateral distance to one another on the assembly surface, the distance between adjacent semiconductor units is at least 5 μm and maximally 55 μm, and the pixels can be controlled in an electrically separated manner. The invention also relates to a method for producing said component. ## Claims ### Claim 1 A component comprising at least one optoelectronic semiconductor chip having a connection substrate comprising a mounting surface and electrical contact structures and a plurality of structured semiconductor units, each comprising a plurality of monolithically integrated image points each having an active layer which emits light during operation, wherein the semiconductor units are arranged on the mounting surface at a distance from one another laterally and the image points are separately electrically controllable, wherein each image point is electrically connected to at least one semiconductor contact, each image point is associated with a respective electrical contact structure, and the electrical contact structure associated with an image point can be electrically connected to the semiconductor contact of the respective image point. ### Claim 2 (depends on 1) The component according to claim 1, in which a distance (d) between adjacent semiconductor units is at least 5 μm and no more than 55 μm. ### Claim 3 (depends on 1) The component according to claim 1, in which the active layers of the image points are in a monolithically integrated form and the image points are separately electrically controllable by means of multiple semiconductor contacts which are at a distance from one another laterally, wherein a distance (a) between adjacent semiconductor contacts is at least 1 μm and no more than 25 μm. ### Claim 4 (depends on 1) The component according to claim 1, in which, between the active layers of adjacent image points, a separation trench having a width (B) of at least 5 μm and no more than 25 μm is arranged in each case. ### Claim 5 (depends on 4) The component according to claim 4, in which the image points are optically separate from one another. ### Claim 6 (depends on 1) The component according to claim 1, in which at least two of the semiconductor units comprise different numbers of image points. ### Claim 7 (depends on 1) The component according to claim 1, in which the connection substrate comprises at least one integrated circuit. ### Claim 8 (depends on 1) The component according to claim 1, in which the connection substrate contains a plurality of current sources, wherein each of the current sources is uniquely associated with one of the image points and is electrically connected to this image point. ### Claim 9 (depends on 1) The component according to claim 1, in which the distance between adjacent semiconductor units deviates by no more than +/−10% from an average width of the separation trenches. ### Claim 10 (depends on 1) The component according to claim 1, in which the distances between adjacent semiconductor units deviate by no more than +/−10% from an average distance (a) between adjacent semiconductor units. ### Claim 11 (depends on 1) The component according to claim 1, in which a light-emitting surface area of the component is at least 8 mm2, preferably at least 40 mm2. ### Claim 12 (depends on 1) The component according to claim 1, in which a total number of image points of the component is at least 128, preferably at least 2500, and/or a luminous flux of the light emitted by the total number of the image points is at least 1600 lumen, preferably at least 6400 lumen. ### Claim 13 (depends on 1) The component according to claim 1, comprising at least two optoelectronic semiconductor chips, which are arranged on a printed circuit board. ### Claim 14 A method for producing a component, comprising the following method steps: preparing a plurality of semiconductor units, each comprising a plurality of monolithically produced image points each having an active layer which emits light during operation, wherein each semiconductor unit is applied on a growth substrate in each case; preparing a connection substrate having a mounting surface and electrical contact structures, applying the semiconductor units on the mounting surface in such a way that the semiconductor units are arranged on the mounting surface at a distance from one another laterally, wherein a distance (d) between adjacent semiconductor units is at least 5 μm and no more than 55 μm and the image points are separately electrically controllable, wherein each image point is electrically connected to at least one semiconductor contact, each image point is associated with a respective electrical contact structure, and the electrical contact structure associated with an image point can be electrically connected to the semiconductor contact of the respective image point; and at least partly detaching the growth substrate. ### Claim 15 (depends on 14) The method according to claim 14, wherein the semiconductor units are prepared by means of singulation from a wafer composite having a plurality of image points. ### Claim 16 (depends on 15) The method according to claim 15, wherein the preparation of the semiconductor units furthermore comprises the following method steps: detecting semiconductor units having defective image points, separating out the semiconductor units having defective image points in such a way that, within the limits of manufacturing tolerances, exclusively semiconductor units having intact image points are applied on the mounting surface. ### Claim 17 (depends on 14) The method according to claim 14, wherein between the active layers of adjacent image points, a separation trench having a width (B) of at least 5 μm and no more than 25 μm is arranged in each case, and wherein the distance between adjacent semiconductor units deviates by no more than +/−10% from an average width of the separation trenches. ### Claim 18 A component comprising at least one optoelectronic semiconductor chip having a connection substrate comprising a mounting surface and electrical contact structures and a plurality of structured semiconductor units, each comprising a plurality of monolithically integrated image points each having an active layer which emits light during operation, wherein the semiconductor units are arranged on the mounting surface at a distance from one another laterally, the image points are separately electrically controllable, wherein each image point is electrically connected to at least one semiconductor contact, each image point is associated with a respective electrical contact structure; and the electrical contact structure associated with an image point can be electrically connected to the semiconductor contact of the respective image point, between the active layers of adjacent image points, a separation trench having a width (B) of at least 5 μm and no more than 25 μm is arranged in each case, and the distance between adjacent semiconductor units deviates by no more than +/−10% from an average width of the separation trenches.