# US 10,504,869 B2 · Semiconductor device

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- Number: US 10,504,869 B2
- Document ID: US10504869B2
- Status: Granted
- Kind: B2
- Application number: 15/710,619
- Filed: 2017-09-20
- Published: 2018-04-05
- Granted: 2019-12-10
- Earliest claimed: 2016-09-30
- Assignees: Renesas Electronics Corporation
- Applicants: Renesas Electronics Corporation
- Inventors: Shoji Hashizume; Yasushi Takahashi
- Web page: https://patentgrep.com/patent/US10504869B2

## CPC

- H10W 70/457: {of metallic layers on leadframes}
- H10W 70/411: {Chip-supporting parts, e.g. die pads}
- H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00}
- H10W 74/016: {using moulds}
- H10W 74/111: {the semiconductor body being completely enclosed}
- H10W 74/129: {forming a chip-scale package [CSP]}
- H10W 70/429: {being the outer leads}
- H10W 70/465: {Bumps or wires}
- H10W 72/0198: {batch processes}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07338: {hardening the adhesive by curing, e.g. thermosetting}
- H10W 72/075: {of bond wires}
- H10W 72/07533: {Ultrasonic bonding, e.g. thermosonic bonding}
- H10W 72/07552: {changes in structures or sizes}
- H10W 72/325: {Die-attach connectors having a filler embedded in a matrix}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/354: {comprising polymers}
- H10W 72/527: {Multiple bond wires having different sizes}
- H10W 72/5363: {the connected ends being wedge-shaped}
- H10W 72/552: {comprising metals or metalloids, e.g. silver}
- H10W 72/5522: {comprising gold [Au]}
- H10W 72/5524: {comprising aluminium [Al]}
- H10W 72/5525: {comprising copper [Cu]}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/90: Bond pads, in general
- H10W 72/926: {Multiple bond pads having different sizes}
- H10W 72/931: {Shapes of bond pads}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

To improve a performance of a semiconductor device, a semiconductor device includes a lead electrically coupled to a semiconductor chip via a wire. An inner portion of the lead, the semiconductor chip, and the wire are sealed by a sealing body (a resin sealing body). The wire is bonded to an upper surface of a wire bonding portion of the inner portion of the lead. A metal film is formed on a lower surface of the inner portion of the lead, which is on an opposite side to the upper surface. No metal film is formed on the upper surface of the wire bonding portion.

## Claims

### Claim 1

A semiconductor device comprising:
a die pad having a first surface and a second surface opposite to the first surface;
a first lead spaced apart from the die pad;
a semiconductor chip having a power transistor, and mounted over the first surface of the die pad via a die bonding material;
a first wire electrically connecting a first electrode of the semiconductor chip with the first lead; and
a resin sealing body sealing the semiconductor chip, an inner portion of the first lead and the first wire such that an outer portion of the first lead is exposed,
wherein the first lead has a third surface that is on the same side as the first surface of the die pad, and a fourth surface opposite to the third surface,
wherein the third surface in the inner portion of the first lead and the fourth surface in the inner portion of the first lead are covered with the resin sealing body,
wherein the first wire is bonded to the third surface of a wire bonding portion of the inner portion of the first lead, and
wherein a metal film is formed on each of the fourth surface in the inner portion of the first lead, the third surface in the outer portion of the first lead, and the fourth surface in the outer portion of the first lead, without forming the metal film on an entirety of the third surface in the inner portion of the first lead.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the metal film is formed on the fourth surface of the wire bonding portion of the inner portion of the first lead.

### Claim 3 (depends on 2)

The semiconductor device according to claim 2, wherein the wire bonding portion of the first lead has a first apical surface located on an opposite side to a boundary between the inner portion and the outer portion in the inner portion,
wherein the fourth surface of the wire bonding portion of the first lead has a first corner crossing the first apical surface, and
wherein the metal film is formed in a region including the first corner.

### Claim 4 (depends on 3)

The semiconductor device according to claim 3, wherein the metal film is formed on the entire fourth surface of the wire bonding portion.

### Claim 5 (depends on 3)

The semiconductor device according to claim 3, wherein no metal film is formed on a portion of the fourth surface of the first lead in the inner portion, and a base member of the first lead is in contact with the resin sealing body over the portion of the fourth surface.

### Claim 6 (depends on 2)

The semiconductor device according to claim 2, wherein the metal film is made of a metal material different from a metal material forming a base member of the first lead.

### Claim 7 (depends on 2)

The semiconductor device according to claim 2, wherein the die pad and the first lead are arranged to be lined up in a first direction,
wherein the semiconductor device includes:
a second lead that is arranged alongside the first lead in a second direction crossing the first direction and is spaced apart from the die pad;
a second wire electrically connecting a second electrode of the semiconductor chip and the second lead; and
the resin sealing body sealing the semiconductor chip, the inner portion of the first lead, the first wire, an inner portion of the second lead, and the second wire such that an outer portion of the second lead is exposed,
wherein the second lead has a fifth surface on the same side as the third surface of the first lead and a sixth surface opposite to the fifth surface,
wherein the fifth surface in the inner portion of the second lead and the sixth surface in the inner portion of the second lead are covered with the resin sealing body,
wherein the second wire is bonded to the fifth surface of a wire bonding portion of the inner portion of the second lead,
wherein the metal film is formed on the sixth surface in the wire bonding portion of the inner portion of the second lead, and
wherein no metal film is formed on the fifth surface in the wire bonding portion of the inner portion of the second lead.

### Claim 8 (depends on 7)

The semiconductor device according to claim 7, further comprising a third lead that is arranged between the first lead and the second lead along the second direction and has one end coupled to the die pad,
wherein the resin sealing body sealing the semiconductor chip, the inner portion of the first lead, the first wire, the inner portion of the second lead, the second wire, and an inner portion of the third lead such that an outer portion of the third lead is exposed,
wherein the third lead has a seventh surface that is on the same side as the first surface of the die pad, an eighth surface opposite to the seventh surface, and a first portion located between the wire bonding portion of the first lead and the wire bonding portion of the second lead in plan view,
wherein the seventh surface in the inner portion of the third lead and the eighth surface in the inner portion of the third lead are covered with the resin sealing body,
wherein the metal film is formed on the eighth surface in the first portion of the third lead, and
wherein no metal film is formed on the seventh surface in the first portion of the third lead.

### Claim 9 (depends on 1)

The semiconductor device according to claim 1, wherein the first wire includes an electrode bonding portion to be bonded to the first electrode, a lead bonding portion to be bonded to the wire bonding portion of the first lead, and an extending portion extending from one of the electrode bonding portion and the lead bonding portion to the other, and
wherein a thickness of the lead bonding portion of the first wire is smaller than a line diameter of the extending portion in a thickness direction of the first lead.

### Claim 10 (depends on 1)

The semiconductor device according to claim 1, wherein in a base member of the first lead, a surface roughness of the third surface in the wire bonding portion is rougher than a surface roughness of the fourth surface in the inner portion.

### Claim 11 (depends on 1)

The semiconductor device according to claim 1,
wherein the inner portion has the wire bonding portion and another portion,
wherein, in plan view, a width of the wire bonding portion is greater than a width of the another portion, and
wherein the metal film is formed on the fourth surface in the inner portion of the first lead, without forming the metal film on the fourth surface in the another portion of the inner portion.