# US 10,504,861 B2 · Semiconductor device with over pad metal electrode and method for manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,504,861 B2 - Document ID: US10504861B2 - Status: Granted - Kind: B2 - Application number: 15/988,483 - Filed: 2018-05-24 - Published: 2019-01-03 - Granted: 2019-12-10 - Earliest claimed: 2017-06-29 - Assignees: Renesas Electronics Corporation - Applicants: Renesas Electronics Corporation - Inventors: Takashi Moriyama; Takashi Tonegawa - Web page: https://patentgrep.com/patent/US10504861B2 ## CPC - H10W 74/147: {the encapsulations being multilayered} - H10W 20/42: Vias, e.g. via plugs - H10W 72/01935: {by plating, e.g. electroless plating or electroplating} - H10W 72/01938: {in gaseous form, e.g. by CVD or PVD} - H10W 72/50: Bond wires - H10W 72/5522: {comprising gold [Au]} - H10W 72/5525: {comprising copper [Cu]} - H10W 72/59: Bond pads specially adapted therefor - H10W 72/923: {Bond pads having multiple stacked layers} - H10W 72/934: {Cross-sectional shape, i.e. in side view} - H10W 72/9415: {relative to the surface, e.g. recessed, protruding} - H10W 72/9445: {Top-view layouts, e.g. mirror arrays} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device and a method for manufacturing the semiconductor device which ensure improved reliability, permit further miniaturization, and suppress the increase in manufacturing cost. The semiconductor device includes: a pad electrode formed in the uppermost wiring layer of a multilayer wiring layer formed over a semiconductor substrate; a surface protective film formed in a manner to cover the pad electrode; an opening made in the surface protective film in a manner to expose the pad electrode partially; and a conductive layer formed over the pad electrode exposed at the bottom of the opening. The thickness of the conductive layer formed over the pad electrode is smaller than the thickness of the surface protective film formed over the pad electrode. ## Claims ### Claim 1 A semiconductor device comprising: a multilayer wiring layer formed over a semiconductor substrate; a pad electrode formed in an uppermost wiring layer of the multilayer wiring layer; a surface protective film formed in a manner to cover the pad electrode; an opening made in the surface protective film in a manner to expose the pad electrode partially; and a conductive layer formed over the pad electrode exposed at a bottom of the opening, wherein thickness of the conductive layer formed over the pad electrode is smaller than thickness of the surface protective film formed over the pad electrode, wherein the surface protective film is a laminated film which includes a first insulating film formed over the pad electrode in a manner to cover the pad electrode and a second insulating film formed over the first insulating film, wherein the pad electrode includes a first barrier metal film, a first conductive film formed over the first barrier metal film, and a second barrier metal film formed over the first conductive film, wherein the first insulating film is formed over the second barrier metal film, wherein in an area exposed from the first insulating film, the second barrier metal film is removed and the first conductive film is exposed, wherein the second insulating film lies over an upper surface and side surfaces of the first insulating film and over side surfaces of the second barrier metal film, and over the first conductive film, in a manner to expose the first conductive film partially, wherein the conductive layer lies over the first conductive film and over the second insulating film formed over the first conductive film, and wherein thickness of the conductive layer formed over the first conductive film is smaller than a sum of thicknesses of the first insulating film and the second insulating film which are formed over the second barrier metal film. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein length of the second insulating film in contact with the first conductive film is larger than length of the conductive layer formed over the second insulating film. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the second insulating film is made of a material with a higher water resistance than the first insulating film. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein a third insulating film is formed over the surface protective film in a manner to expose the conductive layer. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the conductive layer includes a nickel film, a palladium film formed over the nickel film, and a gold film formed over the palladium film. ### Claim 6 (depends on 4) The semiconductor device according to claim 4, wherein the third insulating film is formed in a manner to cover the conductive layer partially and cover the surface protective film. ### Claim 7 A method for manufacturing a semiconductor device, comprising the steps of: (a) forming a pad electrode in an uppermost wiring layer of a multilayer wiring layer over a semiconductor substrate; (b) forming a surface protective film covering the pad electrode; (c) making an opening in the surface protective film in a manner to expose the pad electrode partially; and (d) forming a conductive layer over the pad electrode exposed at a bottom of the opening, wherein thickness of the conductive layer formed over the pad electrode is smaller than thickness of the surface protective film formed over the pad electrode, and wherein the conductive layer is formed by an electroless plating method. ### Claim 8 (depends on 7) The method for manufacturing a semiconductor device according to claim 7, further comprising the steps of: (e) performing plasma treatment on the surface protective film using an inert gas; (f) after the step (e), forming a third insulating film over the surface protective film by a CVD method; and (g) selectively removing the third insulating film so as to expose the conductive layer, wherein the step (e) and the step (f) are successively carried out in a chamber. ### Claim 9 (depends on 7) The method for manufacturing a semiconductor device according to claim 7, wherein the conductive layer includes a nickel film, a palladium film formed over the nickel film, and a gold film formed over the palladium film, and wherein the nickel film, the palladium film, and the gold film are formed by an electroless plating method. ### Claim 10 (depends on 8) The method for manufacturing a semiconductor device according to claim 8, wherein the third insulating film is formed in a manner to cover the conductive layer partially and cover the surface protective film. ### Claim 11 A method for manufacturing semiconductor device, comprising the steps of: (a) forming a pad electrode including a first barrier metal film, a first conductive film formed over the first barrier metal film, and a second barrier metal firm formed over the first conductive film, in an uppermost wiring layer of a multilayer wiring layer over a semiconductor substrate; (b) forming a first insulating film over the second barrier metal film in a manner to cover the pad electrode; (c) forming a first resist pattern over the first insulating film; (d) selectively removing the first insulating film and the second barrier metal film by etching using the first resist pattern as a mask, so as to expose the first conductive film partially; (e) after the step (d), removing the first resist pattern; (f) after the step (e), forming a second insulating film in a manner to cover the first insulating film, side surfaces of the second barrier metal film, and the first conductive film; (g) forming a second resist pattern over the second insulating film; (h) selectively removing the second insulating film by etching using the second resist pattern as a mask, so as to expose the first conductive film partially and make the second insulating film remain over an upper surface and side surfaces of the first insulating film, over side surfaces of the second barrier metal film, and over the first conductive film; (i) after the step (h), removing the second resist pattern; and (j) after the step (i), forming a conductive layer over the exposed first conductive film, wherein thickness of the conductive layer formed over the first conductive film is smaller than a sum of thicknesses of the first insulating film and the second insulating film which are formed over the second barrier metal film. ### Claim 12 (depends on 11) The method for manufacturing a semiconductor device according to claim 11, wherein length of the second insulating film in contact with the first conductive film is larger than length of the conductive layer formed over the second insulating film. ### Claim 13 (depends on 11) The method for manufacturing a semiconductor device according to claim 11, wherein the second insulating film is made of a material with a higher water resistance than the first insulating film. ### Claim 14 (depends on 11) The method for manufacturing a semiconductor device according to claim 11, further comprising the steps of: (k) performing plasma treatment on the second insulating film using an inert gas; (l) after the step (k), forming a third insulating film over the second insulating film by a CVD method; and (m) selectively removing the third insulating film so as to expose the conductive layer, wherein the step (k) and the step (1) are successively carried out in a chamber. ### Claim 15 (depends on 11) The method for manufacturing a semiconductor device according to claim 11, wherein the conductive layer is formed by an electroless plating method. ### Claim 16 (depends on 14) The method for manufacturing a semiconductor device according to claim 14, wherein the third insulating film is formed in a manner to cover the conductive layer partially and cover the second insulating film. ### Claim 17 (depends on 15) The method for manufacturing a semiconductor device according to claim 15, wherein the conductive layer includes a nickel film, a palladium film formed over the nickel film, and a gold film formed over the palladium film, and wherein the nickel film, the palladium film, and the gold film are formed by the electroless plating method.