# US 10,504,853 B2 · Electronic device capable of suppressing electromagnetic radiation and manufacturing method thereof

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- Number: US 10,504,853 B2
- Document ID: US10504853B2
- Status: Granted
- Kind: B2
- Application number: 15/925,792
- Filed: 2018-03-20
- Published: 2018-11-08
- Granted: 2019-12-10
- Earliest claimed: 2017-05-02
- Assignees: Realtek Semiconductor Corp.
- Applicants: Realtek Semiconductor Corporation
- Inventors: Hsiao-Tsung Yen; Yuh-Sheng Jean; Ta-Hsun Yeh
- Web page: https://patentgrep.com/patent/US10504853B2

## CPC

- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10D 1/20: Inductors
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/497: {Inductive arrangements or effects of, or between, wiring layers}
- H10W 42/263: {Shielding bumps}
- H10W 42/267: {Patterned shielding planes}
- H10W 42/273: {the arrangements being between laterally adjacent chips, e.g. walls between chips}
- H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)}
- H10W 90/00: Package configurations
- H10W 42/271: {the arrangements being between stacked chips}
- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 72/01: {Manufacture or treatment}
- H10W 72/07254: {changes in dispositions}
- H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/247: {Dispositions of multiple bumps}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

An electronic device includes a first semiconductor die, a plurality of bumps, and a substrate. The first semiconductor die includes a first conductive feature. The bumps are disposed on the first semiconductor die and are connected to the first conductive feature. The substrate includes a second conductive feature. The bumps are electrically connected to the second conductive feature. The first conductive feature, the bumps, and the second conductive feature are configured to form at least one ring structure.

## Claims

### Claim 1

An electronic device, comprising:
a first semiconductor die comprising:
a first electromagnetic radiation source structure;
a second electromagnetic radiation source structure; and
a first conductive feature that is between the first and second electromagnetic radiation source structures and is substantially a straight line having a linewidth greater than linewidths of the first and second electromagnetic radiation source structures;
a plurality of bumps disposed on the first semiconductor die and connected to the first conductive feature; and
a substrate comprising a second conductive feature, wherein the bumps are electrically connected to the second conductive feature and are directly in contact with the first and second conductive features, and the first conductive feature, the bumps, and the second conductive feature are configured to form at least one ring structure.

### Claim 2 (depends on 1)

The electronic device of claim 1, wherein the bumps are bonded with the second conductive feature.

### Claim 3 (depends on 1)

The electronic device of claim 1, wherein the substrate is a printed circuit board.

### Claim 4 (depends on 1)

The electronic device of claim 1, wherein the substrate is a second semiconductor die.

### Claim 5 (depends on 1)

The electronic device of claim 1, further comprising a third semiconductor die, wherein the third semiconductor die is located between the first semiconductor die and the substrate, and the bumps are electrically connected to the second conductive feature through the third semiconductor die.

### Claim 6 (depends on 5)

The electronic device of claim 5, wherein the third semiconductor die comprises a plurality of conductive contacts, and the bumps are electrically connected to the second conductive feature respectively through the conductive contacts.

### Claim 7 (depends on 6)

The electronic device of claim 6, wherein the third semiconductor die comprises a third conductive feature, and the third conductive feature is connected to the conductive contacts.

### Claim 8 (depends on 1)

The electronic device of claim 1, wherein the first conductive feature and the second conductive feature have a space therebetween, the bumps are disposed in the space to form at least one subspace, and the subspace is surrounded and formed by adjacent two of the bumps, a portion of the first conductive feature, and a portion of the second conductive feature.

### Claim 9 (depends on 8)

The electronic device of claim 8, wherein a number of the at least one subspace is plural, and the subspaces are arranged in a series.

### Claim 10 (depends on 1)

The electronic device of claim 1, wherein at least one of the first conductive feature, the bumps, and the substrate is grounded.

### Claim 11 (depends on 1)

The electronic device of claim 1, wherein at least one of the first conductive feature, the bumps, and the substrate is floated.

### Claim 12 (depends on 1)

The electronic device of claim 1, wherein the second conductive feature has a vertical projection on the first semiconductor die, and the vertical projection is located between the first electromagnetic radiation source structure and the second electromagnetic radiation source structure.

### Claim 13 (depends on 1)

The electronic device of claim 1, wherein the first electromagnetic radiation source structure and the second electromagnetic radiation source structure are separated at two sides of an entirety of the first conductive feature, the bumps, and the second conductive feature.