# US 10,504,839 B2 · Semiconductor device and manufacturing method of the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,504,839 B2 - Document ID: US10504839B2 - Status: Granted - Kind: B2 - Application number: 16/188,581 - Filed: 2018-11-13 - Published: 2019-03-14 - Granted: 2019-12-10 - Earliest claimed: 2011-10-04 - Assignees: Sony Corporation - Applicants: Sony Corporation - Inventors: Masanaga Fukasawa - Web page: https://patentgrep.com/patent/US10504839B2 ## CPC - H10W 20/43: Layouts of interconnections - H10F 39/811: {Interconnections} - H10W 20/023: {the interconnections being through-semiconductor vias} - H10W 20/0234: {comprising etching via holes that stop on pads or on electrodes} - H10W 20/0242: {comprising etching via holes from the back sides of the chips, wafers or substrates} - H10W 20/0257: {comprising using a sacrificial placeholder, e.g. using a sacrificial plug} - H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] - H10W 20/2125: {Top-view shapes} - H10W 20/2134: {TSVs extending from the semiconductor wafer into back-end-of-line layers} - H10W 20/42: Vias, e.g. via plugs - H10W 90/00: Package configurations - H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips} - H10W 90/732: {between stacked chips} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract Disclosed herein is a semiconductor device including: a substrate having a first conductive layer and a second conductive layer arranged deeper than the first conductive layer; a large-diameter concave portion having, on a main side of a substrate, an opening sized to overlap the first and second conductive layers, with the first conductive layer exposed in part of the bottom of the large-diameter concave portion; a small-diameter concave portion extended from the large-diameter concave portion and formed by digging into the bottom of the large-diameter concave portion, with the second conductive layer exposed at the bottom of the small-diameter concave portion; and a conductive member provided in a connection hole made up of the large- and small-diameter concave portions to connect the first and second conductive layers. ## Claims ### Claim 1 A semiconductor device, comprising: a first substrate having a first semiconductor layer and a first interconnect layer having a first conductive layer and a first insulating layer; a second substrate having a second semiconductor layer and a second interconnect layer having a second conductive layer and a second insulating layer; and a connection hole having a large-diameter concave portion and a small-diameter concave portion, wherein the large-diameter concave portion includes, on a first side of the first substrate, an opening sized to overlap the first and second conductive layers, with a part of the first conductive layer exposed in part of a bottom of the large-diameter concave portion, wherein the small-diameter concave portion extends from the bottom of the large-diameter concave portion, with a part of the second conductive layer exposed in part of a bottom of the small-diameter concave portion, wherein a conductive member in the connection hole connects the first and second conductive layers, and wherein a part of the second insulating layer is exposed in part of the bottom of the small-diameter concave portion. ### Claim 2 (depends on 1) The semiconductor device of claim 1, wherein the first substrate and the second substrate are bonded to each other. ### Claim 3 (depends on 1) The semiconductor device of claim 1, wherein a part of the first insulating layer is exposed in part of the bottom of the large-diameter concave portion. ### Claim 4 (depends on 1) The semiconductor device of claim 1, wherein the conductive member is a filling metal filled into the connection hole. ### Claim 5 (depends on 1) The semiconductor device of claim 1, wherein the conductive member is provided on an inner wall of the connection hole. ### Claim 6 A manufacturing method of a semiconductor device comprising: forming, on a structure with a first substrate having a first semiconductor layer and a first interconnect layer having a first conductive layer and a first insulating layer and a second substrate having a second semiconductor layer and a second interconnect layer having a second conductive layer and a second insulating layer, a large-diameter resist pattern on a first side of the first substrate having an opening that exposes tops of the first and second conductive layers; forming, in the structure, a connection hole having a large-diameter concave portion and a small-diameter concave portion, wherein the large-diameter concave portion includes on the first side of the first substrate an opening to overlap the first and second conductive layers, with a part of the first conductive layer exposed in part of a bottom of the large-diameter concave portion based on etching using the large-diameter resist pattern as a mask; forming, on the first side of the first substrate, a small-diameter resist pattern having an opening that exposes the top of the second conductive layer within an area where the large-diameter concave portion is formed; forming, in the structure, the small-diameter concave portion extending from the bottom of the large-diameter concave portion, with a part of the second conductive layer exposed in part of a bottom of the small-diameter concave portion based on etching using the small-diameter resist pattern as a mask; and connecting, in the connection hole, the first and second conductive layers with a conductive member, wherein a part of the second insulating layer is exposed in part of the bottom of the small-diameter concave portion. ### Claim 7 (depends on 6) The manufacturing method of the semiconductor device of claim 6, wherein after the formation of the large-diameter concave portion, the small-diameter resist pattern is formed in such a manner as to cover the first conductive layer, and the small-diameter concave portion is formed by etching using the small-diameter resist pattern as a mask. ### Claim 8 (depends on 6) The manufacturing method of the semiconductor device of claim 6, wherein a part of the first insulating layer is exposed in part of the bottom of the large-diameter concave portion. ### Claim 9 (depends on 6) The manufacturing method of the semiconductor device of claim 6, wherein the conductive member is a filling metal filled into the connection hole. ### Claim 10 (depends on 6) The manufacturing method of the semiconductor device of claim 6, wherein the conductive member is provided on an inner wall of the connection hole. ### Claim 11 (depends on 6) The manufacturing method of the semiconductor device of claim 6, wherein the first substrate and the second substrate are bonded to each other.