# US 10,504,834 B2 · Contact structure and the method of forming the same

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- Number: US 10,504,834 B2
- Document ID: US10504834B2
- Status: Granted
- Kind: B2
- Application number: 15/909,777
- Filed: 2018-03-01
- Published: 2019-09-05
- Granted: 2019-12-10
- Earliest claimed: 2018-03-01
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Yu-Wen Cheng; Wei-Yip Loh; Yu-Hsiang Liao; Sheng-Hsuan Lin; Hong-Mao Lee; Chun-I Tsai; Ken-Yu Chang; Wei-Jung Lin; Chih-Wei Chang; Ming-Hsing Tsai
- Web page: https://patentgrep.com/patent/US10504834B2

## CPC

- H10D 30/0212: {using self-aligned silicidation}
- H10W 20/42: Vias, e.g. via plugs
- H10D 30/0223: {having source and drain regions or source and drain extensions self-aligned to sides of the gate}
- H10D 64/0112: {using conductive layers comprising silicides}
- H10D 64/01125: {the silicides being formed by chemical reaction with the semiconductor after the contact hole formation}
- H10D 84/0186: {Manufacturing their interconnections or electrodes, e.g. source or drain electrodes}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10W 20/033: {in openings in dielectrics}
- H10W 20/064: {by modifying the conductivity of conductive parts, e.g. by alloying}
- H10W 20/069: {by forming self-aligned vias or self-aligned contact plugs}
- H10W 20/076: {in via holes or trenches}
- H10W 20/081: {by forming openings in the dielectric parts}
- H10W 20/096: {by contacting with gases, liquids or plasmas}
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W 20/4437: {the principal metal being a transition metal}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/635: {Through-vias}
- H10W 72/00: Interconnections or connectors in packages
- H10W 72/012: {of bump connectors, dummy bumps or thermal bumps}
- H10W 72/072: {of bump connectors}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 20/047: {by introducing additional elements therein}
- H10W 20/425: {Barrier, adhesion or liner layers}
- H10W 20/4403: {based on metals, e.g. alloys, metal silicides (H10W20/4484 takes precedence)}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device and method of forming the same that includes forming a dielectric layer over a substrate and patterning a contact region in the dielectric layer, the contact region having side portions and a bottom portion that exposes the substrate. The method can also include forming a dielectric barrier layer in the contact region to cover the side portions and the bottom portion, and etching the dielectric barrier layer to expose the substrate. Subsequently, a conductive layer can be formed to cover the side portions and the bottom portion of the contact region and the conductive layer can be annealed to form a silicide region in the substrate beneath the bottom portion of the contact region, and the conductive layer can then be selectively removed on the side portions of the contact region. Finally, a surface treatment can be performed in the contact region to form N-rich areas in the dielectric layer and a nitridation region in the substrate, and an adhesion layer can formed in the contact region to cover the side portions and the bottom portion of the contact region.

## Claims

### Claim 1

A method for forming a semiconductor contact structure, the method comprising:
forming a dielectric layer over a substrate;
patterning a contact region in the dielectric layer, the contact region having side portions and a bottom portion that exposes the substrate;
forming a dielectric barrier layer in the contact region to cover the side portions and the bottom portion, and etching the dielectric barrier layer to expose the substrate;
forming a conductive layer in the contact region to cover the side portions and the bottom portion of the contact region;
annealing the conductive layer to form a silicide region in the substrate beneath the bottom portion of the contact region, then removing the conductive layer on the side portions of the contact region;
performing a surface treatment on the side portions and the bottom portion of the contact region that forms a nitridation region in the substrate; and
forming an adhesion layer in the contact region to cover the side portions and the bottom portion of the contact region, including the silicide region in the substrate and the dielectric barrier layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the surface treatment is at least one of an isotropic plasma treatment, a free radical plasma treatment, an implantation, and a wet chemical treatment.

### Claim 3 (depends on 1)

The method of claim 1, wherein etching the dielectric barrier layer to expose the substrate removes a portion of the dielectric barrier layer to form exposed side portions of the contact region.

### Claim 4 (depends on 3)

The method of claim 3, wherein performing the surface treatment in the contact region nitridizes the dielectric layer in the exposed side portions of the contact region to form N-rich areas therein and nitridizes the bottom portion of the contact region to form the nitridation region in the substrate.

### Claim 5 (depends on 1)

The method of claim 1, where the adhesion layer formed in the contact region to cover the side portions and the bottom portion of the contact region has a thickness of less than 20 Å.

### Claim 6 (depends on 5)

The method of claim 5, wherein the adhesion layer that is formed in the contact region to cover the side portions and the bottom portion of the contact region is a continuous and conformal layer.

### Claim 7 (depends on 1)

The method of claim 1, wherein the adhesion layer is formed of TiN or TaN.

### Claim 8 (depends on 1)

The method of claim 1, further comprising forming a metal plug in the contact region that is in contact with the adhesion layer.

### Claim 9 (depends on 1)

The method of claim 1, wherein etching the dielectric barrier layer further exposes an upper portion of the dielectric layer and a lower portion of the dielectric layer, and the dielectric barrier layer is between the upper portion of the dielectric layer and the lower portion of the dielectric layer after etching the dielectric barrier layer.

### Claim 10

A method for forming a semiconductor contact structure, the method comprising:
depositing a dielectric layer over a substrate;
etching a contact region in the dielectric layer, the contact region having side portions and a bottom portion that exposes the substrate;
depositing a dielectric barrier layer in the contact region to cover the side portions and the bottom portion, and etching the dielectric barrier layer to expose the substrate;
applying a surface treatment in the contact region to nitridize the side and bottom portions of the contact region, wherein a portion of the dielectric layer and the dielectric barrier layer are exposed during the surface treatment; and
depositing an adhesion layer in the contact region to cover the side portions and the bottom portion of the opening, including the dielectric barrier layer.

### Claim 11 (depends on 10)

The method of claim 10, wherein applying the surface treatment in the contact region nitridizes the side portions of the contact region to form N-rich areas in dielectric layer and nitridizes the bottom portion of the contact region to form the a nitridation region in the substrate.

### Claim 12 (depends on 10)

The method of claim 10, wherein the surface treatment applied to treat the contact region includes at least one of a free radical plasma treatment, an isotropic plasma treatment, an implantation, and a wet chemical treatment.

### Claim 13

A method for forming a semiconductor device, the method comprising:
etching a contact region in a dielectric layer, the dielectric layer being positioned over a substrate, the contact region having side portions and a bottom portion that exposes the substrate;
depositing a dielectric barrier layer in the contact region to partially cover the side portions of the contact region;
forming a silicide region located in the substrate beneath the bottom portion of the contact region having a conductive layer that is formed over the silicide region;
performing a surface treatment on the side portions and the bottom portion of the contact region that forms a nitridation region adjacent the bottom portion of the contact region within the substrate and N-rich areas along the side portions of the contact region; and
depositing an adhesion layer in the contact region to cover the side portions and the bottom portion of the contact region, including the silicide region in the substrate and the dielectric barrier layer.

### Claim 14 (depends on 13)

The method of claim 13, wherein forming the silicide region located in the substrate beneath the bottom portion of the contact region further comprises:
depositing a conductive layer in the contact region to cover the side portions and the bottom portion of the contact region;
annealing the conductive layer to form a silicide region in the substrate beneath the bottom portion of the contact region; and
removing the conductive layer on the side portions of the contact region.

### Claim 15 (depends on 13)

The method of claim 13, wherein depositing the dielectric barrier layer in the contact region to partially cover the side portions of the contact region further comprises:
forming the dielectric barrier layer in the contact region to cover the side portions and the bottom portion; and
etching the dielectric barrier layer to expose the substrate, and further remove a portion of the dielectric barrier layer to form exposed side portions of the contact region.

### Claim 16 (depends on 13)

The method of claim 13, where the adhesion layer formed in the contact region to cover the side portions and the bottom portion of the contact region has a thickness of less than 20 Å.

### Claim 17 (depends on 16)

The method of claim 16, wherein the adhesion layer that is formed in the contact region to cover the side portions and the bottom portion of the contact region is a continuous and conformal layer.

### Claim 18 (depends on 13)

The method of claim 13, wherein the adhesion layer is formed of TiN or TaN.

### Claim 19 (depends on 13)

The method of claim 13, further comprising forming a metal plug in the contact region that is in direct contact with the adhesion layer.

### Claim 20 (depends on 13)

The method of claim 13, wherein the N-rich areas are formed in the dielectric layer, and the adhesion layer is in direct contact with the N-rich areas.