# US 10,504,797 B2 · Method for forming semiconductor device and resulting device

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- Number: US 10,504,797 B2
- Document ID: US10504797B2
- Status: Granted
- Kind: B2
- Application number: 15/690,340
- Filed: 2017-08-30
- Published: 2019-02-28
- Granted: 2019-12-10
- Earliest claimed: 2017-08-30
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Tong-Min Weng; Tsung-Han Wu
- Web page: https://patentgrep.com/patent/US10504797B2

## CPC

- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 64/01326: {Aspects related to lithography, isolation or planarisation of the conductor}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/021: {using multiple gate spacer layers, e.g. bilayered sidewall spacers}
- H10D 64/671: {the conductor having lateral variation in doping or structure}
- H10D 84/0184: {Manufacturing their gate sidewall spacers}
- H10D 84/0193: {the components including FinFETs}
- H10D 84/853: {comprising FinFETs}
- H10P 14/6518: {by introduction of substances into an already-existing insulating layer}
- H10P 14/662: {Laminate layers, e.g. stacks of alternating high-k metal oxides (adhesion layers or buffer layers H10P14/6508, H10P14/6548)}
- H10P 14/6922: {the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC}
- H10P 14/6924: {the material being halogen doped silicon oxides, e.g. FSG}
- H10P 14/69433: {the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz}
- H10P 30/40: into insulating materials
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method for forming a semiconductor device includes steps of: forming at least one gate structure comprising a gate electrode over a substrate, and forming a first dielectric layer of a first dielectric material along a side wall of the at least one gate structure. The first dielectric layer of the first dielectric material includes fluorine doped silicon oxycarbonitride with a doping concentration of fluorine. The dielectric constant of the first dielectric layer is adjusted through the doping concentration of fluorine.

## Claims

### Claim 1

A method for forming a semiconductor device, comprising:
forming at least one gate structure including a gate electrode over a substrate, the gate electrode including a first conductive material; and
forming a first dielectric layer of a first dielectric material along a side wall of the at least one gate structure, the first dielectric layer of the first dielectric material comprising a fluorine doped silicon oxycarbonitride or silicon oxycarbide with a doping concentration of fluorine,
wherein the forming the first dielectric layer comprises:
forming a base layer comprising silicon ocycarbonitride or silicon oxycarbide along the side wall of the at least one gate structure; and
doping the base layer through molecular ion implantation using a precursor composition comprising a fluorine-containing precursor, wherein the fluorine-containing precursor comprises hydrogen fluoride (HF).

### Claim 2 (depends on 1)

The method of claim 1, wherein the first conductive material in the gate electrode comprises polysilicon.

### Claim 3 (depends on 1)

The method of claim 1, wherein the doping concentration of fluorine in the first dielectric layer is in a range of from about 1×103 to about 1×106 atoms/cm3.

### Claim 4 (depends on 1)

The method of claim 1, wherein the first dielectric layer has a dielectric constant, and the dielectric constant of the first dielectric layer is adjusted through the doping concentration of fluorine.

### Claim 5 (depends on 4)

The method of claim 4, wherein the dielectric constant of the first dielectric layer is in a range of from about 2 to about 3.

### Claim 6 (depends on 1)

The method of claim 1, further comprising:
forming a second dielectric layer of a second dielectric material laterally over and in contact with the first dielectric layer.

### Claim 7 (depends on 6)

The method of claim 6, further comprising:
forming an interlayer dielectric (ILD) layer laterally over and in contact with the second dielectric layer.

### Claim 8 (depends on 6)

The method of claim 6, wherein the second dielectric material comprises silicon nitride, and the ILD layer comprises silicon oxycarbonitride.

### Claim 9 (depends on 1)

The method of claim 1, further comprising:
replacing the first conductive material in the gate electrode with a second conductive material comprising at least one metal.

### Claim 10 (depends on 1)

The method of claim 1, wherein carbon and oxygen are implanted together with fluorine when the first dielectric layer is formed.

### Claim 11 (depends on 1)

The method of claim 1, wherein the at least one gate structure having the second conductive material comprising at least one metal is a dummy gate providing a resistor-capacitor (RC) structure.

### Claim 12 (depends on 1)

The method of claim 1, wherein the fluorine-containing precursor is a mixture of HF and carbon monoxide (CO) having a molar ratio of HF:CO in a range from about 1:5 to 5:1.

### Claim 13 (depends on 12)

The method of claim 12, wherein the mixture of HF and CO is energized to form a mixture of molecular ions including HF+ and CO+.

### Claim 14 (depends on 12)

The method of claim 12, wherein the first dielectric layer is in contact with the gate electrode.

### Claim 15

A method for forming a semiconductor device, comprising:
forming at least one gate structure comprising a gate electrode over a substrate, the gate electrode comprising a first conductive material;
forming a first dielectric layer along a side wall of the at least one gate structure, the first dielectric layer comprising fluorine doped silicon oxycarbonitride with a doping concentration of fluorine; and
forming a second dielectric layer comprising silicon nitride laterally over and in contact with the first dielectric layer,
wherein the forming the first dielectric layer of a first dielectric material comprises:
forming a base layer comprising silicon oxycarbonitride along the side wall of the at least one gate structure; and
doping the base layer through molecular ion implantation using a precursor composition comprising hydrogen fluoride (HF).

### Claim 16 (depends on 15)

The method of claim 15, wherein the precursor composition further comprises carbon monoxide (CO).

### Claim 17 (depends on 15)

The method of claim 15, further comprising:
forming an interlayer dielectric (ILD) layer laterally over and in contact with the second dielectric layer, the ILD layer comprising silicon oxycarbonitride; and
replacing the first conductive material in the gate electrode with a second conductive material comprising at least one metal.

### Claim 18

A method for forming a semiconductor device, comprising:
forming at least one gate structure comprising a gate electrode over a substrate, the gate electrode comprising a first conductive material;
forming a first dielectric layer along a side wall of the at least one gate structure, the first dielectric layer comprising fluorine doped silicon oxycarbonitride with a doping concentration of fluorine; and
forming a second dielectric layer comprising silicon nitride laterally over and in contact with the first dielectric layer,
wherein the forming the first dielectric layer of a first dielectric material comprises:
forming a base layer comprising silicon oxycarbonitride along the side wall of the at least one gate structure; and
doping the base layer through molecular ion implantation using a precursor composition comprising a mixture containing molecular ions of HF+ and CO+.

### Claim 19 (depends on 18)

The method of claim 18, wherein the mixture has a ratio of HF+ and CO+ in a range of 1:1.