# US 10,504,746 B2 · HKMG integration

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- Number: US 10,504,746 B2
- Document ID: US10504746B2
- Status: Granted
- Kind: B2
- Application number: 15/484,527
- Filed: 2017-04-11
- Published: 2017-10-12
- Granted: 2019-12-10
- Earliest claimed: 2016-04-12
- Assignees: Applied Materials, Inc.
- Applicants: Applied Materials, Inc.
- Inventors: Zhenjiang Cui; Xing Zhong; Jie Liu; Linlin Wang
- Web page: https://patentgrep.com/patent/US10504746B2

## CPC

- H10P 50/267: {using plasmas}
- H01J 37/32357: {Generation remote from the workpiece, e.g. down-stream}
- H01J 37/32422: {Arrangement for selecting ions or species in the plasma}
- H10D 64/01318: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314)}
- H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)}
- H10D 64/669: {the conductor further comprising additional layers of alloy material, compound material or organic material, e.g. TaN/TiAlN}
- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10P 50/268: {of silicon-containing layers}
- H10P 50/287: {by chemical means}
- H10P 50/71: {using masks for conductive or resistive materials}
- H10P 70/273: {the processing being a delineation of conductive layers, e.g. by RIE}
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H01J: ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps H01T; electric arc lamps H05B31/00; particle accelerators H05H)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method for processing a semiconductor substrate is described herein. The method described herein includes generating fluorine radicals and ions, delivering the fluorine radicals through an ion blocker to a processing region, and removing one or more portions of a gate structure to expose one or more portions of a gate dielectric material disposed thereunder. The gate structure includes at least two ceramic or metal layers, and the gate dielectric material is made of a high-k dielectric material. A substrate having the gate structure and gate dielectric material formed thereon is disposed in the processing region, and the temperature of the substrate is maintained at about 60 degrees Celsius or higher. By etching the gate structure using fluorine radicals at a temperature greater or equal to 60 degrees Celsius, the at least two ceramic or metal layers have a flat cross sectional profile.

## Claims

### Claim 1

A method, comprising:
placing a substrate into a plasma processing chamber;
forming a plasma in a plasma cavity of the plasma processing chamber;
flowing radicals in the plasma to a processing region of the plasma processing chamber, wherein ions in the plasma are blocked from entering the processing region; and
removing a portion of two layers of a gate structure disposed on the substrate by the radicals in an radical etching process, wherein each of the two layers comprises TiN, TiSiN, TaN, TiAl, or alloys thereof, wherein the ions are blocked from entering the processing region during the radical etching process, wherein a temperature of the substrate during the removing of the portion of the two layers ranges from about 60 degrees Celsius to about 300 degrees Celsius.

### Claim 2 (depends on 1)

The method of claim 1, wherein the two layers are made of different materials.

### Claim 3 (depends on 1)

The method of claim 1, wherein the gate structure is disposed on a gate dielectric material.

### Claim 4 (depends on 3)

The method of claim 3, wherein the gate dielectric material comprises a high-k dielectric material.

### Claim 5 (depends on 1)

The method of claim 1, wherein the radicals flowing into the processing region comprise fluorine radicals.

### Claim 6 (depends on 5)

The method of claim 5, wherein the radicals flowing into the processing region further comprise oxygen radicals.

### Claim 7

A method, comprising:
placing a substrate into a plasma processing chamber, wherein the substrate includes a gate structure disposed thereon and a photoresist disposed on the gate structure, wherein the gate structure includes two layers, the photoresist is disposed on a first portion of the two layers, and the two layers are made of different materials;
forming a plasma in a plasma cavity of the plasma processing chamber;
flowing radicals in the plasma to a processing region of the plasma processing chamber, wherein ions in the plasma are blocked from entering the processing region; and
removing a second portion of the two layers of the gate structure disposed on the substrate by the radicals in an radical etching process, wherein the ions are blocked from entering the processing region during the radical etching process, wherein a temperature of the substrate during the removing of the second portion of the two layers ranges from about 60 degrees Celsius to about 300 degrees Celsius, wherein the first portion of the two layers is covered by the photoresist and a third portion of the two layers is exposed after the removing of the second portion of the two layers.

### Claim 8 (depends on 7)

The method of claim 7, wherein the two layers each comprises TiN, TiSiN, TaN, TiAl, or alloys thereof.

### Claim 9 (depends on 7)

The method of claim 7, wherein a distance between an edge of the third portion of the two layers and an edge of the photoresist is at most 30 Angstroms.

### Claim 10 (depends on 7)

The method of claim 7, wherein third portion has a width of at most 30 Angstroms.

### Claim 11 (depends on 7)

The method of claim 7, wherein the temperature of the substrate during the removing of the portions second portion of the two layers of the gate structure ranges from about 60 degrees Celsius to about 100 degrees Celsius.

### Claim 12

A method, comprising:
placing a substrate into a plasma processing chamber, wherein the substrate includes a gate structure disposed on a high-k dielectric material and a photoresist disposed on the gate structure, wherein the gate structure includes two layers, the photoresist is disposed on a first portion of the two layers;
forming a plasma in a plasma cavity of the plasma processing chamber;
flowing radicals in the plasma to a processing region of the plasma processing chamber, wherein ions in the plasma are blocked from entering the processing region;
removing a second portion of the two layers of the gate structure by the radicals in an radical etching process, wherein the ions are blocked from entering the processing region during the radical etching process, wherein a temperature of the substrate during the removing of the second portion of the two layers ranges from about 60 degrees Celsius to about 300 degrees Celsius, wherein the first portion of the two layers is covered by the photoresist and a third portion of the two layers is exposed after the removing of the second portion of the two layers; and
removing the photoresist and residue radicals disposed on the substrate.

### Claim 13 (depends on 12)

The method of claim 12, wherein the radicals flowing into the processing region comprise fluorine radicals.

### Claim 14 (depends on 12)

The method of claim 12, wherein the two layers each comprises TiN, TiSiN, TaN, TiAl, or alloys thereof.

### Claim 15 (depends on 14)

The method of claim 14, wherein the two or more layers are made of different materials.

### Claim 16 (depends on 15)

The method of claim 15, wherein a distance between an edge of the third portion of the two layers and an edge of the photoresist is at most 30 Angstroms.

### Claim 17 (depends on 15)

The method of claim 15, wherein the third portion has a width of at most 30 Angstroms.