# US 10,504,735 B2 · Method of forming a semiconductor device by high-pressure anneal and post-anneal treatment

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- Number: US 10,504,735 B2
- Document ID: US10504735B2
- Status: Granted
- Kind: B2
- Application number: 15/952,714
- Filed: 2018-04-13
- Published: 2019-04-04
- Granted: 2019-12-10
- Earliest claimed: 2017-09-29
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Hongfa Luan; Huicheng Chang; Cheng-Po Chau; Wen-Yu Ku; Yi-Fan Chen; Chun-Yen Peng
- Web page: https://patentgrep.com/patent/US10504735B2

## CPC

- H10D 64/0134: {with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor}
- H10D 30/021: {of FETs having insulated gates [IGFET]}
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates}
- H10D 62/021: {Forming source or drain recesses by etching e.g. recessing by etching and then refilling}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 64/01: Manufacture or treatment
- H10D 64/01338: {with a treatment, e.g. annealing, after the formation of the conductor}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/514: {characterised by the insulating layers}
- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10D 84/013: {Manufacturing their source or drain regions, e.g. silicided source or drain regions}
- H10D 84/0135: {Manufacturing their gate conductors}
- H10D 84/0144: {Manufacturing their gate insulating layers}
- H10D 84/0147: {Manufacturing their gate sidewall spacers}
- H10D 84/0158: {the components including FinFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10P 32/1408: {from or through or into an external applied layer, e.g. photoresist or nitride layers}
- H10P 32/171: {being group IV material}
- H10P 50/642: {Chemical etching}
- H10P 95/062: {involving a dielectric removal step}
- H10D 30/6219: {characterised by the source or drain electrodes}
- H10D 64/685: {being perpendicular to the channel plane}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Embodiment described herein provide a thermal treatment process following a high-pressure anneal process to keep hydrogen at an interface between a channel region and a gate dielectric layer in a field effect transistor while removing hydrogen from the bulk portion of the gate dielectric layer. The thermal treatment process can reduce the amount of threshold voltage shift caused by a high-pressure anneal. The high-pressure anneal and the thermal treatment process may be performed any time after formation of the gate dielectric layer, thus, causing no disruption to the existing process flow.

## Claims

### Claim 1

A method comprising:
performing a high-pressure anneal process to a structure having a first gate dielectric layer formed over a channel region of an active area and a second gate dielectric layer formed over the first gate dielectric layer, the high-pressure anneal process introducing hydrogen to an interface between the first gate dielectric layer and the channel region;
after performing the high-pressure anneal process, performing a post-anneal treatment to reduce hydrogen in the second gate dielectric layer; and
after performing the post-anneal treatment, forming a gate electrode over the second gate dielectric layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein performing the post-anneal treatment comprises:
exposing the structure to an ambient environment comprising at least one of nitrogen (N2), argon (Ar), helium (He), hydrogen (H2), deuterium (D2), or a combination thereof.

### Claim 3 (depends on 1)

The method of claim 1, wherein performing the post-anneal treatment comprises:
exposing the structure to an ambient environment at a temperature in a range from about 200° C. to about 700° C.

### Claim 4 (depends on 1)

The method of claim 1, wherein the post-anneal treatment is performed at a pressure in a range from about 1 mTorr to about 5 atmosphere.

### Claim 5 (depends on 1)

The method of claim 1, wherein the high-pressure anneal process and the post-anneal treatment are performed in the same chamber.

### Claim 6 (depends on 1)

The method of claim 1, wherein the high-pressure anneal process and the post-anneal treatment are performed in different chambers.

### Claim 7 (depends on 1)

The method of claim 1, wherein performing the high-pressure anneal process comprises:
exposing the structure to an anneal ambient environment of hydrogen (H2), deuterium (D2), nitrogen (N2), argon (Ar), helium (He), or a combination thereof.

### Claim 8 (depends on 1)

The method of claim 1, wherein:
after performing the post-anneal treatment, a ratio of a peak concentration of hydrogen in the first gate dielectric layer to a peak concentration of hydrogen in the second gate dielectric layer is in a range from about 0.1 to about 5.

### Claim 9 (depends on 1)

The method of claim 1, wherein:
after performing the post-anneal treatment, a ratio of a total hydrogen count in the first gate dielectric layer to a total hydrogen count in the second gate dielectric layer is in a range from about 0.1 to about 2.

### Claim 10

A method, comprising:
forming a dielectric structure over a channel region of an active area, wherein the dielectric structure includes an interfacial layer over the active area and a conformal dielectric layer over the interfacial layer;
annealing the dielectric structure at a first pressure to introduce hydrogen to an interface between the interfacial layer and the channel region;
performing a post-anneal treatment on the dielectric structure at a second pressure to reduce hydrogen in the conformal dielectric layer, wherein the first pressure is higher than the second pressure; and
after performing the post-anneal treatment, forming a gate electrode over the conformal dielectric layer.

### Claim 11 (depends on 10)

The method of claim 10, wherein the first pressure is in a range from about 5 atmosphere to about 70 atmosphere, and the second pressure is in a range from about 1 mTorr to about 5 atmosphere.

### Claim 12 (depends on 10)

The method of claim 10, wherein the post-anneal treatment comprises an ambient environment of nitrogen (N2), argon (Ar), helium (He), hydrogen (H2), deuterium (D2), or a combination thereof.

### Claim 13 (depends on 12)

The method of claim 12, wherein the ambient environment is at a temperature in a range from about 350° C. to about 500° C.

### Claim 14

A method, comprising:
forming a first dielectric layer over a channel region of an active area of a substrate;
forming a second dielectric layer over the first dielectric layer over the channel region of the active area;
after forming the first dielectric layer and after forming the second dielectric layer, performing an anneal on the first dielectric layer and the second dielectric layer to introduce first atoms between the second dielectric layer and the active area, wherein the first atoms comprise hydrogen or deuterium;
performing a post-anneal treatment to reduce the first atoms in the second dielectric layer, wherein the anneal is performed at a higher pressure than the post-anneal treatment; and
after performing the post-anneal treatment, forming a gate electrode over the first dielectric layer and the second dielectric layer.

### Claim 15 (depends on 14)

The method of claim 14, wherein the post-anneal treatment is performed at a pressure in a range from about 1 mTorr to about 5 atmosphere.

### Claim 16 (depends on 14)

The method of claim 14, further comprising forming a conductive fill over the second dielectric layer prior to performing the post-anneal treatment.

### Claim 17 (depends on 14)

The method of claim 14, wherein a ratio of a peak concentration of hydrogen in the first dielectric layer to a peak concentration of hydrogen in the second dielectric layer is in a range from about 2.7 to about 5.

### Claim 18 (depends on 14)

The method of claim 14, wherein the second dielectric layer is a conformal dielectric layer over the first dielectric layer and sidewalls of gate spacers.

### Claim 19 (depends on 14)

The method of claim 14, wherein the post-anneal treatment is performed in an environment comprising nitrogen (N2), argon (Ar), helium (He), hydrogen (H2), deuterium (D2), or a combination thereof.

### Claim 20 (depends on 14)

The method of claim 14, wherein a total number of hydrogen atoms in the first dielectric layer is about equal to a total number of hydrogen atoms in the second dielectric layer.