# US 10,504,726 B2 · Nano-scale structures

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- Number: US 10,504,726 B2
- Document ID: US10504726B2
- Status: Granted
- Kind: B2
- Application number: 15/625,930
- Filed: 2017-06-16
- Published: 2017-10-05
- Granted: 2019-12-10
- Earliest claimed: 2013-07-25
- Assignees: SK hynix Inc.
- Applicants: SK hynix Inc.
- Inventors: Keun Do Ban; Jung Gun Heo; Cheol Kyu Bok; Myoung Soo Kim
- Web page: https://patentgrep.com/patent/US10504726B2

## CPC

- H10P 76/20: of masks comprising organic materials
- H10B 12/0335: {Making a connection between the transistor and the capacitor, e.g. plug}
- H10B 12/318: {the storage electrode having multiple segments}
- H10D 1/043: {using patterning processes to form electrode extensions, e.g. etching}
- H10D 1/716: {having vertical extensions}
- H10P 50/692: {characterised by their composition, e.g. multilayer masks or materials}
- H10P 50/695: {characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask}
- H10P 50/696: {Process specially adapted to improve the resolution of the mask}
- H10P 76/4085: {characterised by the processes involved to create the masks}
- H10B 63/80: {Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays}
- H10N 70/011: {Manufacture or treatment of multistable switching devices}
- Y10T 428/24669: Aligned or parallel nonplanarities
- Y10T 428/24802: Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T 428/24851: Intermediate layer is discontinuous or differential
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

A nanoscale structure includes an array of pillars over an underlying layer, a separation wall layer including first separation walls formed over sidewalls of the pillars, and a block co-polymer (BCP) layer formed over the separation wall layer and filling gaps between the pillars. The BCP layer is phase-separated to include first domains that provide second separation walls formed over the first separation walls and second domains that are separated from each other by the first domains.

## Claims

### Claim 1

A nanoscale structure comprising:
an array of first separation walls over an underlying layer, each of the first separation walls having a hollow cylindrical shape; and
a block co-polymer (BCP) layer formed over inner sidewalls and outer sidewalls of the first separation walls,
wherein the BCP layer includes first domains that provide second separation walls formed over the inner sidewalls and the outer sidewalls of the first separation walls and second domains that are phase separated from each other by the first domains.

### Claim 2 (depends on 1)

The nanoscale structure of claim 1, wherein the BCP layer includes a polystyrene-poly(methyl meta acrylate) (PS-PMMA) co-polymer material or a silicon contained polystyrene-poly(di methyl siloxane) (Si contained PS-PDMS) co-polymer material.

### Claim 3 (depends on 1)

The nanoscale structure of claim 1, wherein each of the first domains has a ‘U’-shaped sectional view that covers a sidewall and a bottom surface of each of the second domains.

### Claim 4 (depends on 1)

The nanoscale structure of claim 1,
wherein a unit array of the first separation walls includes four of the first separation walls which are located at four vertices of a tetragon or three of the first separation walls which are located at three vertices of a triangle; and
wherein the second domains are disposed in a central portion of the tetragon or the triangle as well as in the first separation walls.